Rick
On Jan 20, 2009, at 8:17 AM, Dean Glazeski wrote:
For some reason, it appears the svn update isn't working. A fresh check out of the repository and everything looks good. I'm probably doing something wrong during the update. Is there a standard way to update my working copy once you commit changes that I made? Thanks.// Dean Rick Altherr wrote:In my copy of the repo, at91sam9260.cfg is what at91sam9260minimal.cfg was. In fact, the checkin shows that at91sam9260.cfg was replaced. The fix in unknown-board-atmel- at91sam9260.cfg is still necessary.Committed in r1353. Rick On Jan 19, 2009, at 11:52 PM, Dean Glazeski wrote:It looks like this patch didn't get applied quite right on r1350. It appears that at91sam9260.cfg is the same as before, but at91sam9260minimal.cfg is now gone. I went ahead and got the old minimal config down and changed the at91sam9260.cfg file. There was also a mistake I left in the 'unknown board' configuration file. Patch is attached against r1350.// Dean Rick Altherr wrote:Committed in r1350. Rick On Jan 17, 2009, at 1:39 AM, Dean Glazeski wrote:I went ahead and did some moving of some files relating to the AT91SAM9260 and the Olimex SAM9-L9260 development board. I also created another file for the Olimex JTAG TINY that doesn't include the 'A'. Apparently, the description for the JTAG tiny can differ between Windows and Linux Operating Systems and this can make a difference, so I figured it might be nice to have two of them. Probably could do an include to reduce redundancy, but I'll leave that decision to some one else.Partial annoyance: the created patch file lists some files as having a new property set called 'svn:mergeinfo', but their contents are not included. Here is the 'svn status' on modified rev1333R + src/target/target/at91sam9260.cfg D src/target/target/at91sam9260minimal.cfg A src/target/board/olimex_sam9_l9260.cfg A + src/target/board/unknown-board-atmel-at91sam9260.cfg A src/target/interface/olimex-jtag-tiny.cfgHere is the general idea because the two new files are not fully listed in the patch: target/at91sam9260.cfgR1333 -> board/unknown-board-atmel- at91sam9260.cfgtarget/at91sam9260minimal.cfgR1333 -> target/at91sam9260.cfgActual patch file is attached. Some of the missing files are attached as well.// Dean Glazeski Property changes on: src/target/target/at91sam9260.cfg ___________________________________________________________________ Added: svn:mergeinfo Index: src/target/target/at91sam9260minimal.cfg= ==================================================================--- src/target/target/at91sam9260minimal.cfg (revision 1334) +++ src/target/target/at91sam9260minimal.cfg (working copy) @@ -1,42 +0,0 @@ -###################################### -# Target: Atmel AT91SAM9260 -###################################### - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME at91sam9260 -} - -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little -} - -if { [info exists CPUTAPID ] } { - set _CPUTAPID $CPUTAPID -} else { - # force an error till we get a good number - set _CPUTAPID 0x0792603f -} - -reset_config trst_and_srst - -#-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf - expected-id $_CPUTAPID- -jtag_nsrst_delay 200 -jtag_ntrst_delay 200 - -###################### -# Target configuration -###################### - -set _TARGETNAME [format "%s.cpu" $_CHIPNAME]-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain- position $_TARGETNAME -variant arm926ejs- -# Internal sram1 memory-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1- - Index: src/target/board/olimex_sam9_l9260.cfg= ==================================================================--- src/target/board/olimex_sam9_l9260.cfg (revision 0) +++ src/target/board/olimex_sam9_l9260.cfg (revision 0) @@ -0,0 +1,10 @@ +## +# Olimex SAM9-L9260 board configuration file +# +# Date Author Change +# ---- ------ ------ +# 17/Jan/2009 Dean Glazeski Initial Creation +# +## + +source [find target/at91sam9260.cfg]Property changes on: src/target/board/unknown-board-atmel- at91sam9260.cfg___________________________________________________________________ Added: svn:mergeinfo Index: src/target/interface/olimex-jtag-tiny.cfg= ==================================================================--- src/target/interface/olimex-jtag-tiny.cfg (revision 0) +++ src/target/interface/olimex-jtag-tiny.cfg (revision 0) @@ -0,0 +1,9 @@ +## +# Olimex JTAG TINY USB Debugger+# Linux USB tends to see the device description without the 'A' as in target/olimex-jtag-tiny.cfg, +# but Windows still needs the 'A'. This is a replacement for Linux users.+## +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG TINY" +ft2232_layout olimex-jtag +ft2232_vid_pid 0x15ba 0x0004 # Thanks to Pieter Conradie for this script! # Target: Atmel AT91SAM9260 ###################################### # We add to the minimal configuration. source [find target/at91sam9260minimal.cfg] ###################### # Target configuration ###################### $_TARGETNAME configure -event reset-init { # at reset chip runs at 32khz jtag_khz 8 mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdogmww 0xfffffc20 0x00004001 # CKGR_MOR : enable the main oscillatorsleep 20 # wait 20 msmww 0xfffffc30 0x00000001 # PMC_MCKR : switch to main oscillatorsleep 10 # wait 10 msmww 0xfffffc28 0x2060bf09 # CKGR_PLLAR: Set PLLA Register for 198,656MHzsleep 20 # wait 20 ms mww 0xfffffc30 0x00000101 # PMC_MCKR : Select prescaler sleep 10 # wait 10 msmww 0xfffffc30 0x00000102 # PMC_MCKR : Clock from PLLA is selectedsleep 10 # wait 10 ms # Now run at anything fast... ie: 10mhz! jtag_khz 10000 # Increase JTAG Speed to 6 MHz arm7_9 dcc_downloads enable # Enable faster DCC downloadsmww 0xffffec00 0x01020102 # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBitmww 0xffffec04 0x09070806 # SMC_PULSE0 mww 0xffffec08 0x000d000b # SMC_CYCLE0 mww 0xffffec0c 0x00001003 # SMC_MODE0 flash probe 0 # Identify flash bank 0mww 0xfffff870 0xffff0000 # PIO_ASR : Select peripheral function for D15..D31 mww 0xfffff804 0xffff0000 # PIO_PDR : Disable PIO function for D15..D31mww 0xffffef1c 0x2 # EBI_CSA : Assign EBI Chip Select 1 to SDRAM#mww 0xffffea08 0x85227259 # SDRAMC_CR : Configure SDRAM (2 x Samsung K4S561632H-UC75 : 4M x 16Bit x 4 Banks) mww 0xffffea08 0x85227254 # SDRAMC_CR : Configure SDRAM (2 x Samsung K4S641632H-UC75 : 1M x 16Bit x 4 Banks)mww 0xffffea00 0x1 # SDRAMC_MR : issue a NOP commandmww 0x20000000 0mww 0xffffea00 0x2 # SDRAMC_MR : issue an 'All Banks Precharge' commandmww 0x20000000 0mww 0xffffea00 0x4 # SDRAMC_MR : issue 8 x 'Auto-Refresh' Commandmww 0x20000000 0 mww 0xffffea00 0x4 mww 0x20000000 0 mww 0xffffea00 0x4 mww 0x20000000 0 mww 0xffffea00 0x4 mww 0x20000000 0 mww 0xffffea00 0x4 mww 0x20000000 0 mww 0xffffea00 0x4 mww 0x20000000 0 mww 0xffffea00 0x4 mww 0x20000000 0 mww 0xffffea00 0x4 mww 0x20000000 0mww 0xffffea00 0x3 # SDRAMC_MR : issue a 'Load Mode Register' commandmww 0x20000000 0 mww 0xffffea00 0x0 # SDRAMC_MR : normal mode mww 0x20000000 0mww 0xffffea04 0x5d2 # SDRAMC_TR : Set refresh timer count to 15us} ##################### # Flash configuration ##################### #flash bank cfi <base> <size> <chip width> <bus width> <target#> flash bank cfi 0x10000000 0x01000000 2 2 0 ###################################### # Target: Atmel AT91SAM9260 ###################################### if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME at91sam9260 } if { [info exists ENDIAN] } { set _ENDIAN $ENDIAN } else { set _ENDIAN little } if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID } else { # force an error till we get a good number set _CPUTAPID 0x0792603f } reset_config trst_and_srst #jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf - expected-id $_CPUTAPIDjtag_nsrst_delay 200 jtag_ntrst_delay 200 ###################### # Target configuration ###################### set _TARGETNAME [format "%s.cpu" $_CHIPNAME]target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain- position $_TARGETNAME -variant arm926ejs# Internal sram1 memory$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1_______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development-- Rick Altherr kc8...@kc8apf.net"He said he hadn't had a byte in three days. I had a short, so I split it with him."-- UnsignedIndex: src/target/target/at91sam9260.cfg =================================================================== --- src/target/target/at91sam9260.cfg (revision 1350) +++ src/target/target/at91sam9260.cfg (working copy) @@ -1,82 +1,42 @@ -# Thanks to Pieter Conradie for this script! +###################################### # Target: Atmel AT91SAM9260 ###################################### -# We add to the minimal configuration. -source [find target/at91sam9260minimal.cfg] +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME at91sam9260 +} -###################### -# Target configuration -###################### +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} -$_TARGETNAME configure -event reset-init { - # at reset chip runs at 32khz - jtag_khz 8 - mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset - mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # force an error till we get a good number + set _CPUTAPID 0x0792603f +}- mww 0xfffffc20 0x00004001 # CKGR_MOR : enable the main oscillator- sleep 20 # wait 20 ms- mww 0xfffffc30 0x00000001 # PMC_MCKR : switch to main oscillator- sleep 10 # wait 10 ms- mww 0xfffffc28 0x2060bf09 # CKGR_PLLAR: Set PLLA Register for 198,656MHz- sleep 20 # wait 20 ms - mww 0xfffffc30 0x00000101 # PMC_MCKR : Select prescaler - sleep 10 # wait 10 ms- mww 0xfffffc30 0x00000102 # PMC_MCKR : Clock from PLLA is selected- sleep 10 # wait 10 ms +reset_config trst_and_srst - # Now run at anything fast... ie: 10mhz!- jtag_khz 10000 # Increase JTAG Speed to 6 MHz- arm7_9 dcc_downloads enable # Enable faster DCC downloads +#+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf - expected-id $_CPUTAPID- mww 0xffffec00 0x01020102 # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit- mww 0xffffec04 0x09070806 # SMC_PULSE0 - mww 0xffffec08 0x000d000b # SMC_CYCLE0 - mww 0xffffec0c 0x00001003 # SMC_MODE0 +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 - flash probe 0 # Identify flash bank 0 +###################### +# Target configuration +######################- mww 0xfffff870 0xffff0000 # PIO_ASR : Select peripheral function for D15..D31 - mww 0xfffff804 0xffff0000 # PIO_PDR : Disable PIO function for D15..D31+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain- position $_TARGETNAME -variant arm926ejs- mww 0xffffef1c 0x2 # EBI_CSA : Assign EBI Chip Select 1 to SDRAM+# Internal sram1 memory+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1- #mww 0xffffea08 0x85227259 # SDRAMC_CR : Configure SDRAM (2 x Samsung K4S561632H-UC75 : 4M x 16Bit x 4 Banks) - mww 0xffffea08 0x85227254 # SDRAMC_CR : Configure SDRAM (2 x Samsung K4S641632H-UC75 : 1M x 16Bit x 4 Banks)- mww 0xffffea00 0x1 # SDRAMC_MR : issue a NOP command- mww 0x20000000 0- mww 0xffffea00 0x2 # SDRAMC_MR : issue an 'All Banks Precharge' command- mww 0x20000000 0- mww 0xffffea00 0x4 # SDRAMC_MR : issue 8 x 'Auto-Refresh' Command- mww 0x20000000 0 - mww 0xffffea00 0x4 - mww 0x20000000 0 - mww 0xffffea00 0x4 - mww 0x20000000 0 - mww 0xffffea00 0x4 - mww 0x20000000 0 - mww 0xffffea00 0x4 - mww 0x20000000 0 - mww 0xffffea00 0x4 - mww 0x20000000 0 - mww 0xffffea00 0x4 - mww 0x20000000 0 - mww 0xffffea00 0x4 - mww 0x20000000 0- mww 0xffffea00 0x3 # SDRAMC_MR : issue a 'Load Mode Register' command- mww 0x20000000 0 - mww 0xffffea00 0x0 # SDRAMC_MR : normal mode - mww 0x20000000 0- mww 0xffffea04 0x5d2 # SDRAMC_TR : Set refresh timer count to 15us-} - - -##################### -# Flash configuration -##################### - -#flash bank cfi <base> <size> <chip width> <bus width> <target#> -flash bank cfi 0x10000000 0x01000000 2 2 0 - Index: src/target/board/unknown-board-atmel-at91sam9260.cfg ===================================================================--- src/target/board/unknown-board-atmel-at91sam9260.cfg (revision 1350) +++ src/target/board/unknown-board-atmel-at91sam9260.cfg (working copy)@@ -3,7 +3,7 @@ ###################################### # We add to the minimal configuration. -source [find target/at91sam9260minimal.cfg] +source [find target/at91sam9260.cfg] ###################### # Target configuration-- Rick Altherr kc8...@kc8apf.net"He said he hadn't had a byte in three days. I had a short, so I split it with him."-- Unsigned
-- Rick Altherr kc8...@kc8apf.net"He said he hadn't had a byte in three days. I had a short, so I split it with him."
-- Unsigned
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