The attached patch will address *some* of the problems you have
found.
If you can help with testing and get this committed, perhaps we can
see more clearly what's going on once the first couple of bugs
are fixed.
The attached patch improves error handling.
Testing is needed for each point below:
1. if writing memory arguments fails, run_algorithm will now fail
early. An error
should be reported and displayed properly.
2. if running the algorithm failed, e.g. w/unexpected exit point, then there
shouldn't be a dangling breakpoint anymore. An error
should be reported and displayed properly.
3. Do you have a case where running the algorithm *does* work that you
can run as a regression test?
Thanks!
--
Øyvind Harboe
http://www.zylin.com/zy1000.html
ARM7 ARM9 XScale Cortex
JTAG debugger and flash programmer
### Eclipse Workspace Patch 1.0
#P openocd
Index: src/target/armv7m.c
===================================================================
--- src/target/armv7m.c (revision 1062)
+++ src/target/armv7m.c (working copy)
@@ -297,6 +297,41 @@
return ERROR_OK;
}
+/* run to exit point. return error if exit point was not reached. */
+static int armv7m_run_and_wait(struct target_s *target, u32 entry_point, int
timeout_ms, u32 exit_point, armv7m_common_t *armv7m)
+{
+ u32 pc;
+ int retval;
+ /* This code relies on the target specific resume() and
poll()->debug_entry()
+ sequence to write register values to the processor and the read them
back */
+ if((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
+ {
+ return retval;
+ }
+ if((retval = target_wait_state(target, TARGET_HALTED, timeout_ms)) !=
ERROR_OK)
+ {
+ return retval;
+ }
+ if (target->state != TARGET_HALTED)
+ {
+ if ((retval=target_halt(target))!=ERROR_OK)
+ return retval;
+ if ((retval=target_wait_state(target, TARGET_HALTED,
500))!=ERROR_OK)
+ {
+ return retval;
+ }
+ return ERROR_TARGET_TIMEOUT;
+ }
+
+
+ armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
+ if (pc != exit_point)
+ {
+ LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
+ return ERROR_TARGET_TIMEOUT;
+ }
+}
+
int armv7m_run_algorithm(struct target_s *target, int num_mem_params,
mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32
entry_point, u32 exit_point, int timeout_ms, void *arch_info)
{
/* get pointers to arch-specific information */
@@ -331,7 +366,8 @@
for (i = 0; i < num_mem_params; i++)
{
- target_write_buffer(target, mem_params[i].address,
mem_params[i].size, mem_params[i].value);
+ if ((retval=target_write_buffer(target, mem_params[i].address,
mem_params[i].size, mem_params[i].value))!=ERROR_OK)
+ return retval;
}
for (i = 0; i < num_reg_params; i++)
@@ -370,42 +406,15 @@
return ERROR_TARGET_FAILURE;
}
- /* This code relies on the target specific resume() and
poll()->debug_entry()
- sequence to write register values to the processor and the read them
back */
- if((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
- {
- return retval;
- }
- if((retval = target_poll(target)) != ERROR_OK)
- {
- return retval;
- }
+ retval = armv7m_run_and_wait(target, entry_point, timeout_ms,
exit_point, armv7m);
- if((retval = target_wait_state(target, TARGET_HALTED, timeout_ms)) !=
ERROR_OK)
- {
- return retval;
- }
- if (target->state != TARGET_HALTED)
- {
- if ((retval=target_halt(target))!=ERROR_OK)
- return retval;
- if ((retval=target_wait_state(target, TARGET_HALTED,
500))!=ERROR_OK)
- {
- return retval;
- }
- return ERROR_TARGET_TIMEOUT;
- }
+ breakpoint_remove(target, exit_point);
-
- armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
- if (pc != exit_point)
+ if (retval != ERROR_OK)
{
- LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
- return ERROR_TARGET_TIMEOUT;
+ return retval;
}
- breakpoint_remove(target, exit_point);
-
/* Read memory values to mem_params[] */
for (i = 0; i < num_mem_params; i++)
{
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