Michael Schwingen wrote: duane> Assertion: duane> During "flash programing", openocd controls the world and the chip. duane> And - there is "ram to be had some where" that openocd can use.
michael> That depends. Getting DDR2 SDRAM controllers initialized can be a quite tedious task, michael> so you may be stuck with what internal SRAM you have available. michael> The IXP42x has 2k mini-IC available for code, other CPUs may have even smaller TCMs Often those big types of CPUs have CACHE which can be fixed at an address and put in lockdown mode. I know a certain jtag box out there that does exactly that to do "dcc downloads" for speed purposes. Perhaps OpenOCD needs a "run this algorithm in the cache" feature. -Duane. _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
