Hello, I am working with a patched OpenOCD on an ARM7 SoC, I have made some modifications to support flash download and flash software breakpoints and it works decently with an Olimex ARM-USB-OCD.
I am trying to get the same setup working with a JLink but I have some problems, namely : Debug: 282 29757 arm7_9_common.c:1344 arm7_9_restore_context(): examining dirty reg: pc Debug: 283 29760 arm7_9_common.c:1330 arm7_9_restore_context(): examining Undefined mode Debug: 284 29764 arm7_9_common.c:1344 arm7_9_restore_context(): examining dirty reg: pc Debug: 285 29767 arm7_9_common.c:1425 arm7_9_restore_context(): writing cpsr with value 0x80000013 Debug: 286 29771 arm7tdmi.c:444 arm7tdmi_write_xpsr(): xpsr: 80000013, spsr: 0 Debug: 287 29774 arm7_9_common.c:1432 arm7_9_restore_context(): writing PC with value 0x000e0000 Debug: 288 29777 embeddedice.c:400 embeddedice_write_reg(): 0: 0x00000004 Error: 289 29900 jlink.c:836 jlink_usb_message(): usb_bulk_read failed (requested=291, result=-116) Error: 290 29904 jlink.c:720 jlink_tap_execute(): jlink_tap_execute, wrong result -1, expected 291 Debug: 291 29907 target.c:613 target_call_event_callbacks(): target event 4 Debug: 292 29911 arm7_9_common.c:1638 arm7_9_resume(): target resumed Error: 293 29917 jlink.c:836 jlink_usb_message(): usb_bulk_read failed (requested=307, result=291) Error: 294 29921 jlink.c:720 jlink_tap_execute(): jlink_tap_execute, wrong result -1, expected 307 Error: 295 30053 jlink.c:842 jlink_usb_message(): usb_bulk_write failed (requested=646, result=-116) Error: 296 30057 jlink.c:720 jlink_tap_execute(): jlink_tap_execute, wrong result -1, expected 321 Error: 297 30189 jlink.c:842 jlink_usb_message(): usb_bulk_write failed (requested=674, result=-116) If I enable more debug in the jlink.c code, I get this : Debug: 83482 109151 jlink.c:190 jlink_execute_queue(): scan end in 8 Debug: 83483 109151 jlink.c:198 jlink_execute_queue(): scan input, length = 4 Debug: 83484 109152 jlink.c:915 jlink_debug_buffer(): 0000 7c Debug: 83485 109153 jlink.c:190 jlink_execute_queue(): scan end in 8 Debug: 83486 109154 jlink.c:198 jlink_execute_queue(): scan input, length = 38 Debug: 83487 109155 jlink.c:915 jlink_debug_buffer(): 0000 09 00 00 00 01 Debug: 83488 109156 jlink.c:190 jlink_execute_queue(): scan end in 8 Debug: 83489 109157 jlink.c:198 jlink_execute_queue(): scan input, length = 38 Debug: 83490 109158 jlink.c:915 jlink_debug_buffer(): 0000 09 00 00 00 04 Debug: 83491 109160 jlink.c:861 jlink_usb_write(): jlink_usb_write, out_length = 992, result = 992 Debug: 83492 109161 jlink.c:915 jlink_debug_buffer(): 0000 cf 00 70 0f 2b 74 01 21 0f ba 80 00 00 00 00 82 Debug: 83493 109162 jlink.c:915 jlink_debug_buffer(): 0010 15 40 00 00 00 00 c1 0a 20 00 00 00 80 60 05 10 ... Debug: 83551 109210 jlink.c:915 jlink_debug_buffer(): 03b0 07 00 00 a8 01 00 02 00 08 00 06 00 3c 2c 08 80 Debug: 83552 109212 jlink.c:915 jlink_debug_buffer(): 03c0 00 00 00 5c fd ff 7f 01 00 00 04 00 10 00 80 00 Debug: 83553 109213 jlink.c:915 jlink_debug_buffer(): 03d0 00 18 00 90 00 00 00 10 00 00 12 00 00 00 08 00 Debug: 83554 109334 jlink.c:875 jlink_usb_read(): jlink_usb_read, result = -116 This happens just when the OpenOCD code starts the CPU for the first time during the flash download code. I am using the libusb from cygwin and the J-link is showing as being handled properly by libusb I am just wondering if anybody is using the J-link with OpenOCD and if they can share any insight ... I am using a recent SVN version : Open On-Chip Debugger 1.0 (2008-08-07-11:24) svn:895M the config file I use is : telnet_port 4444 gdb_port 2332 #interface interface jlink #use combined on interfaces or targets that can't set TRST/SRST separately reset_config trst_and_srst #jtag scan chain #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) jtag_device 4 0x1 0xf 0xf #target configuration #target <type> <startup mode> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant> target arm7tdmi little 0 target_script 0 pre_reset soc_init.script working_area 0 0x000E0000 0x8000 nobackup jtag_khz 300 #flash configuration flash bank soc 0x0 0xBFFFF 32 32 soc init reset halt Regards Francois _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
