[PATCH]: f9f25125f6 contrib: loaders: add am13e230x flash loader algorithm

[gerrit]

This is an automated email from Gerrit.

"Sameer Srivastava <s-srivasta...@ti.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9526

-- gerrit

commit f9f25125f68995287b29214402a80ca70a68b314
Author: Sameer Srivastava <s-srivasta...@ti.com>
Date:   Sun Mar 8 12:12:04 2026 +0530

    contrib: loaders: add am13e230x flash loader algorithm
    
    Created a flash loader for AM13E230X that receives flash sectors via
    shared memory ping-pong buffers, similar to the CC26xx flash loader.
    
    Signed-off-by: Sameer Srivastava <s-srivasta...@ti.com>
    Change-Id: If5759b6f513cf94a0208d1bf4e95eb012a297d17

diff --git a/contrib/loaders/flash/am13e230x/Makefile 
b/contrib/loaders/flash/am13e230x/Makefile
new file mode 100644
index 0000000000..689e4cdf85
--- /dev/null
+++ b/contrib/loaders/flash/am13e230x/Makefile
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+
+BIN2C = ../../../../src/helper/bin2char.sh
+
+CROSS_COMPILE ?= arm-none-eabi-
+GCC     = $(CROSS_COMPILE)gcc
+OBJCOPY = $(CROSS_COMPILE)objcopy
+
+FLAGS  = -mcpu=cortex-m33 -mthumb -Os
+FLAGS += -ffunction-sections -fdata-sections
+FLAGS += -g -gdwarf-3 -gstrict-dwarf
+FLAGS += -Wall -fno-strict-aliasing -fno-builtin
+FLAGS += -nostdlib -nostartfiles
+
+CFLAGS = -c -I.
+
+OBJS := \
+       startup.o \
+       main.o \
+       flash.o
+
+all: am13e230x_algo.inc
+
+%.o: %.c
+       @echo 'Building: $<'
+       $(GCC) $(FLAGS) $(CFLAGS) -o "$@" "$<"
+
+am13e230x_algo.out: $(OBJS)
+       @echo 'Linking: $@'
+       $(GCC) $(FLAGS) -o $@ $(OBJS) -Wl,-T"am13e230x.lds"
+
+%.bin: %.out
+       @echo 'Objcopy: $@'
+       $(OBJCOPY) -Obinary $< $@
+
+%.inc: %.bin
+       @echo 'Bin2Char: $@'
+       $(BIN2C) < $< > $@
+       rm $< $*.out
+
+clean:
+       rm -rf *.o *.d *.out *.bin *.inc *.map
+
+.PRECIOUS: %.bin
+
+.PHONY: all clean
diff --git a/contrib/loaders/flash/am13e230x/am13e230x.lds 
b/contrib/loaders/flash/am13e230x/am13e230x.lds
new file mode 100644
index 0000000000..db0fc1da76
--- /dev/null
+++ b/contrib/loaders/flash/am13e230x/am13e230x.lds
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/******************************************************************************
+ *
+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Linker script for AM13E230X flash loader algorithm.
+ * Everything runs from SRAM. Params and buffers are at fixed addresses
+ * that the OpenOCD driver knows about (see am13e230x.h).
+ *
+ *****************************************************************************/
+
+ENTRY( entry )
+
+MEMORY
+{
+       /* Code, data, bss, stack */
+       PROGRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 0x2000
+       /* Params and data buffers at known addresses */
+       BUFFERS (RWX) : ORIGIN = 0x20002000, LENGTH = 0x1100
+}
+
+SECTIONS
+{
+       .text :
+       {
+               _text = .;
+               *(.entry*)
+               *(.text*)
+               _etext = .;
+       } > PROGRAM
+
+       .data :
+       {
+               _data = .;
+               *(.rodata*)
+               *(.data*)
+               _edata = .;
+       } > PROGRAM
+
+       .bss :
+       {
+               __bss_start__ = .;
+               _bss = .;
+               *(.bss*)
+               *(COMMON)
+               _ebss = .;
+               __bss_end__ = .;
+       } > PROGRAM
+
+       .stack :
+       {
+               _stack = .;
+               *(.stack*)
+               _estack = .;
+       } > PROGRAM
+
+       .buffers :
+       {
+               _buffers = .;
+               *(.buffers.params)
+               . = 0x100;
+               *(.buffers.buf0)
+               *(.buffers.buf1)
+               _ebuffers = .;
+       } > BUFFERS
+}
diff --git a/contrib/loaders/flash/am13e230x/am13e230x_algo.inc 
b/contrib/loaders/flash/am13e230x/am13e230x_algo.inc
new file mode 100644
index 0000000000..3ebb130274
--- /dev/null
+++ b/contrib/loaders/flash/am13e230x/am13e230x_algo.inc
@@ -0,0 +1,785 @@
+/* Autogenerated with ../../../../src/helper/bin2char.sh */
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diff --git a/contrib/loaders/flash/am13e230x/flash.c 
b/contrib/loaders/flash/am13e230x/flash.c
new file mode 100644
index 0000000000..0dc615962d
--- /dev/null
+++ b/contrib/loaders/flash/am13e230x/flash.c
@@ -0,0 +1,187 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/******************************************************************************
+ *
+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Flash operations for AM13E230X, translated from the OpenOCD driver
+ * (src/flash/nor/am13e230x.c) to run on-device with direct register access.
+ *
+ * Memory barriers (__DSB/__ISB) are required around CMDEXEC writes per the
+ * SDK's DL_FlashCTL_executeCommand — the Cortex-M33 write buffer can
+ * reorder peripheral writes without them.
+ *
+ *****************************************************************************/
+
+#include "flash.h"
+
+/*
+ * ARM Cortex-M memory barrier intrinsics.
+ * These are compiler built-ins for DSB and ISB instructions.
+ */
+#define __DSB() __asm volatile("dsb 0xF" ::: "memory")
+#define __ISB() __asm volatile("isb 0xF" ::: "memory")
+
+static void *local_memset(void *s, int c, uint32_t n)
+{
+       uint8_t *p = (uint8_t *)s;
+       while (n--)
+               *p++ = (uint8_t)c;
+       return s;
+}
+
+static void *local_memcpy(void *dst, const void *src, uint32_t n)
+{
+       uint8_t *d = (uint8_t *)dst;
+       const uint8_t *s = (const uint8_t *)src;
+       while (n--)
+               *d++ = *s++;
+       return dst;
+}
+
+void flash_request_gsc_semaphore(void)
+{
+       HWREG(GSC_REG_FPC_FLSEMREQ) = 0x00000001;
+}
+
+void flash_clear_gsc_semaphore(void)
+{
+       HWREG(GSC_REG_FPC_FLSEMCLR) = 0x00000001;
+}
+
+/*
+ * Execute a flash command and wait for completion.
+ * Must be called after all command registers (CMDTYPE, CMDADDR, etc.)
+ * are configured. Matches the SDK's DL_FlashCTL_executeCommand.
+ *
+ * Returns 0 on success, -1 on timeout, -2 on command failure.
+ */
+static int flash_execute_cmd(void)
+{
+       /* Ensure all config register writes complete before execute */
+       __DSB();
+       __ISB();
+
+       HWREG(FCTL_REG_CMDEXEC) = FCTL_CMDEXEC_EXECUTE;
+
+       /* Ensure execute write completes before polling status */
+       __DSB();
+       __ISB();
+
+       uint32_t status;
+       uint32_t timeout = FLASH_TIMEOUT;
+
+       do {
+               status = HWREG(FCTL_REG_STATCMD) &
+                       (FCTL_STATCMD_CMDDONE | FCTL_STATCMD_CMDPASS |
+                        FCTL_STATCMD_CMDINPROGRESS);
+               if (--timeout == 0)
+                       return -1;
+       } while (status == FCTL_STATCMD_CMDINPROGRESS);
+
+       if ((status & FCTL_STATCMD_CMDPASS) == 0)
+               return -2;
+
+       return 0;
+}
+
+/*
+ * Clear the STATCMD register by issuing a CLEARSTATUS command.
+ * Must be called before each erase operation.
+ */
+static int flash_clear_status(void)
+{
+       HWREG(FCTL_REG_CMDTYPE) = FCTL_CMDTYPE_CLEARSTATUS;
+
+       __DSB();
+       __ISB();
+
+       HWREG(FCTL_REG_CMDEXEC) = FCTL_CMDEXEC_EXECUTE;
+
+       __DSB();
+       __ISB();
+
+       uint32_t timeout = FLASH_TIMEOUT;
+       while (HWREG(FCTL_REG_STATCMD) & FCTL_STATCMD_CMDINPROGRESS) {
+               if (--timeout == 0)
+                       return -1;
+       }
+
+       return 0;
+}
+
+/*
+ * Unprotect all sectors by clearing protection registers.
+ * Protection is automatically re-enabled by hardware after each operation.
+ */
+static void flash_unprotect(void)
+{
+       HWREG(FCTL_REG_CMDWEPROTA) = 0;
+       HWREG(FCTL_REG_CMDWEPROTB) = 0;
+}
+
+int flash_sector_erase(uint32_t addr)
+{
+       if (flash_clear_status() != 0)
+               return -1;
+
+       flash_unprotect();
+
+       HWREG(FCTL_REG_CMDTYPE) = FCTL_CMDTYPE_ERASE | FCTL_CMDTYPE_SIZE_SECTOR;
+       HWREG(FCTL_REG_CMDADDR) = addr & 0xFFFFFFF0;
+
+       return flash_execute_cmd();
+}
+
+int flash_write_sector(const uint8_t *data, uint32_t addr, uint32_t count)
+{
+       while (count > 0) {
+               uint32_t num_bytes = (count < FLASH_WORD_SIZE) ? count : 
FLASH_WORD_SIZE;
+               uint32_t num_send = num_bytes;
+               uint8_t padded[16];
+               const uint8_t *write_buf = data;
+
+               /* Pad partial writes to 8-byte ECC boundary */
+               if (num_bytes & 0x7) {
+                       num_send = (num_bytes + 7) & ~0x7;
+                       local_memset(padded, 0xFF, sizeof(padded));
+                       local_memcpy(padded, data, num_bytes);
+                       write_buf = padded;
+               }
+
+               /* Byte enable: one bit per data byte + ECC chunk bits */
+               uint32_t bytes_en = (1u << num_send) - 1;
+               bytes_en |= (1u << 16);           /* ECC chunk 0 */
+               if (num_send > 8)
+                       bytes_en |= (1u << 17);   /* ECC chunk 1 */
+
+               /* SDK calls executeClearStatus + unprotect before every word 
write */
+               flash_clear_status();
+               flash_unprotect();
+
+               HWREG(FCTL_REG_CMDTYPE) = FCTL_CMDTYPE_PROGRAM | 
FCTL_CMDTYPE_SIZE_ONEWORD;
+               HWREG(FCTL_REG_CMDBYTEN) = bytes_en;
+               HWREG(FCTL_REG_CMDADDR) = addr & 0xFFFFFFF0;
+
+               /* Flash word index: (address >> 4) & 3, per SDK */
+               HWREG(FCTL_REG_CMDDATAINDEX) = (addr >> 4) & 3;
+
+               /* Write data to flash data register (up to 4 x 32-bit words) */
+               volatile uint32_t *data_reg = (volatile uint32_t 
*)FCTL_REG_CMDDATA0;
+               for (uint32_t i = 0; i < num_send; i += 4) {
+                       data_reg[i / 4] = (uint32_t)write_buf[i]
+                               | ((uint32_t)write_buf[i + 1] << 8)
+                               | ((uint32_t)write_buf[i + 2] << 16)
+                               | ((uint32_t)write_buf[i + 3] << 24);
+               }
+
+               if (flash_execute_cmd() != 0)
+                       return -1;
+
+               addr += num_bytes;
+               data += num_bytes;
+               count -= num_bytes;
+       }
+
+       return 0;
+}
diff --git a/contrib/loaders/flash/am13e230x/flash.h 
b/contrib/loaders/flash/am13e230x/flash.h
new file mode 100644
index 0000000000..7e6258f16d
--- /dev/null
+++ b/contrib/loaders/flash/am13e230x/flash.h
@@ -0,0 +1,86 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/******************************************************************************
+ *
+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Flash register definitions and operation prototypes for AM13E230X.
+ * Derived from src/flash/nor/am13e230x.c
+ *
+ *****************************************************************************/
+
+#ifndef AM13E230X_FLASH_H
+#define AM13E230X_FLASH_H
+
+#include <stdint.h>
+
+/* Direct 32-bit register access */
+#define HWREG(x) (*((volatile uint32_t *)(x)))
+
+/*
+ * Flash Controller (FCTL) registers
+ * Base: 0x40042000
+ * Register block offset: 0x1000
+ */
+#define FLASH_CONTROL_BASE          0x40042000
+
+#define FCTL_REG_CMDEXEC            (FLASH_CONTROL_BASE + 0x1100)
+#define FCTL_REG_CMDTYPE            (FLASH_CONTROL_BASE + 0x1104)
+#define FCTL_REG_CMDADDR            (FLASH_CONTROL_BASE + 0x1120)
+#define FCTL_REG_CMDBYTEN           (FLASH_CONTROL_BASE + 0x1124)
+#define FCTL_REG_CMDDATAINDEX       (FLASH_CONTROL_BASE + 0x112C)
+#define FCTL_REG_CMDDATA0           (FLASH_CONTROL_BASE + 0x1130)
+#define FCTL_REG_CMDWEPROTA         (FLASH_CONTROL_BASE + 0x11D0)
+#define FCTL_REG_CMDWEPROTB         (FLASH_CONTROL_BASE + 0x11D4)
+#define FCTL_REG_STATCMD            (FLASH_CONTROL_BASE + 0x13D0)
+
+/* STATCMD bits */
+#define FCTL_STATCMD_CMDDONE        0x00000001
+#define FCTL_STATCMD_CMDPASS        0x00000002
+#define FCTL_STATCMD_CMDINPROGRESS  0x00000004
+
+/* CMDEXEC bits */
+#define FCTL_CMDEXEC_EXECUTE        0x00000001
+
+/* CMDTYPE command field */
+#define FCTL_CMDTYPE_PROGRAM        0x00000001
+#define FCTL_CMDTYPE_ERASE          0x00000002
+#define FCTL_CMDTYPE_CLEARSTATUS    0x00000005
+
+/* CMDTYPE size field */
+#define FCTL_CMDTYPE_SIZE_ONEWORD   0x00000000
+#define FCTL_CMDTYPE_SIZE_SECTOR    0x00000040
+
+/*
+ * GSC (Global System Control) flash semaphore registers
+ */
+#define GSC_BASE                    0x40046000
+#define GSC_REG_FPC_FLSEMREQ       (GSC_BASE + 0x1800)
+#define GSC_REG_FPC_FLSEMCLR       (GSC_BASE + 0x1804)
+
+/* Flash geometry */
+#define SECTOR_SIZE                 0x800   /* 2KB */
+#define FLASH_WORD_SIZE             16      /* 128-bit = 16 bytes */
+
+/* Flash region bases */
+#define FLASH_BASE_MAIN             0x00000000
+#define FLASH_BASE_DATA             0x60118000
+
+/* Timeout loop count */
+#define FLASH_TIMEOUT               0x00800000
+
+/*
+ * Flash operation functions
+ */
+
+/* Acquire/release GSC flash semaphore */
+void flash_request_gsc_semaphore(void);
+void flash_clear_gsc_semaphore(void);
+
+/* Erase a single sector at the given address */
+int flash_sector_erase(uint32_t addr);
+
+/* Write count bytes from data to flash at addr (handles 16-byte word writes) 
*/
+int flash_write_sector(const uint8_t *data, uint32_t addr, uint32_t count);
+
+#endif /* AM13E230X_FLASH_H */
diff --git a/contrib/loaders/flash/am13e230x/main.c 
b/contrib/loaders/flash/am13e230x/main.c
new file mode 100644
index 0000000000..c268490d6b
--- /dev/null
+++ b/contrib/loaders/flash/am13e230x/main.c
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/******************************************************************************
+ *
+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * AM13E230X Flash Loader Overview:
+ * --------------------------------
+ * This is a bare-metal flash programming algorithm for the AM13E230X
+ * microcontroller. OpenOCD loads the compiled binary into device SRAM
+ * at 0x20000000 and starts execution. OpenOCD then streams flash data
+ * into two sector-sized (2 KB) SRAM buffers via the debug probe using
+ * a shared-memory handshake protocol identical to the CC26xx loader.
+ *
+ * The algorithm runs an infinite loop, waiting for OpenOCD to fill a buffer
+ * and signal readiness. It then erases the target sector and programs the
+ * buffer contents into flash. Two buffers are used in ping-pong fashion so
+ * that OpenOCD can fill the next buffer while the current one is being
+ * programmed.
+ *
+ * Shared-Memory Protocol
+ * ----------------------
+ * Communication uses two parameter blocks and two data buffers at fixed
+ * SRAM addresses (defined in the linker script and mirrored in the OpenOCD
+ * driver header am13e230x.h):
+ *
+ *   Address       Content
+ *   ----------    -------
+ *   0x20002000    flash_params[0]  (20 bytes)
+ *   0x20002014    flash_params[1]  (20 bytes)
+ *   0x20002100    buffer[0]        (2048 bytes)
+ *   0x20002900    buffer[1]        (2048 bytes)
+ *
+ *   struct flash_params {
+ *       uint32_t dest;      // Flash destination address
+ *       uint32_t len;       // Number of bytes in buffer
+ *       uint32_t cmd;       // Command (see below)
+ *       uint32_t status;    // BUFFER_FULL=0xFFFFFFFF / BUFFER_EMPTY=0x0
+ *       uint32_t buf_addr;  // Address of associated data buffer
+ *   };
+ *
+ * Commands:
+ *   0  CMD_NO_ACTION           Do nothing
+ *   1  CMD_ERASE_ALL           Erase all sectors (not implemented)
+ *   2  CMD_PROGRAM             Program buffer contents to flash
+ *   3  CMD_ERASE_AND_PROGRAM   Erase sector, then program
+ *   4  CMD_ERASE_SECTORS       Erase sectors in range [dest, dest+len)
+ *
+ * Sequence (per sector):
+ *   1. OpenOCD writes sector data to buffer[N]
+ *   2. OpenOCD writes dest, len, cmd to params[N]
+ *   3. OpenOCD writes BUFFER_FULL (0xFFFFFFFF) to params[N].status
+ *   4. Algorithm sees BUFFER_FULL, performs erase + program
+ *   5. Algorithm writes BUFFER_EMPTY (0x0) to params[N].status
+ *   6. OpenOCD polls params[N].status, sees EMPTY, proceeds to next
+ *   7. Meanwhile, algorithm moves to params[N^1] (ping-pong)
+ *
+ * On error, the algorithm writes an error code (non-zero, non-0xFFFFFFFF)
+ * to params[N].status and enters an infinite loop.
+ *
+ *****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "flash.h"
+
+/* Handshake values */
+#define BUFFER_EMPTY    0x00000000
+#define BUFFER_FULL     0xFFFFFFFF
+
+/* Commands */
+#define CMD_NO_ACTION           0
+#define CMD_ERASE_ALL           1
+#define CMD_PROGRAM             2
+#define CMD_ERASE_AND_PROGRAM   3
+#define CMD_ERASE_SECTORS       4
+
+/* Status codes written on error */
+#define STATUS_OK                       0x00000000
+#define STATUS_FAILED_ERASE             0x00000101
+#define STATUS_FAILED_PROGRAM           0x00000102
+#define STATUS_FAILED_UNKNOWN_CMD       0x00000103
+
+/* Parameter block -- must match the OpenOCD driver's struct */
+struct __attribute__((packed)) flash_params {
+       uint32_t dest;      /* Flash destination address */
+       uint32_t len;       /* Number of bytes */
+       uint32_t cmd;       /* Command */
+       uint32_t status;    /* Handshake: BUFFER_FULL / BUFFER_EMPTY */
+       uint32_t buf_addr;  /* Address of data buffer */
+};
+
+/* Params and buffers placed at fixed addresses by the linker script */
+__attribute__((section(".buffers.params")))
+volatile struct flash_params g_params[2];
+
+__attribute__((section(".buffers.buf0")))
+uint8_t g_buf0[SECTOR_SIZE];
+
+__attribute__((section(".buffers.buf1")))
+uint8_t g_buf1[SECTOR_SIZE];
+
+static int do_erase_and_program(volatile struct flash_params *p)
+{
+       /* Erase the target sector */
+       if (flash_sector_erase(p->dest) != 0)
+               return STATUS_FAILED_ERASE;
+
+       /* Program the buffer contents */
+       if (flash_write_sector((const uint8_t *)p->buf_addr, p->dest, p->len) 
!= 0)
+               return STATUS_FAILED_PROGRAM;
+
+       return STATUS_OK;
+}
+
+static int do_program(volatile struct flash_params *p)
+{
+       if (flash_write_sector((const uint8_t *)p->buf_addr, p->dest, p->len) 
!= 0)
+               return STATUS_FAILED_PROGRAM;
+
+       return STATUS_OK;
+}
+
+static int do_erase_sectors(volatile struct flash_params *p)
+{
+       uint32_t addr = p->dest;
+       uint32_t end = p->dest + p->len;
+
+       while (addr < end) {
+               if (flash_sector_erase(addr) != 0)
+                       return STATUS_FAILED_ERASE;
+               addr += SECTOR_SIZE;
+       }
+
+       return STATUS_OK;
+}
+
+int main(void)
+{
+       uint32_t curr_buf = 0;
+       uint32_t status;
+
+       /* Initialize buffer pointers so OpenOCD can read them */
+       g_params[0].buf_addr = (uint32_t)g_buf0;
+       g_params[1].buf_addr = (uint32_t)g_buf1;
+       g_params[0].status = BUFFER_EMPTY;
+       g_params[1].status = BUFFER_EMPTY;
+
+       /* Acquire GSC flash semaphore — must be done by the CPU (not the
+        * debugger) because the flash controller checks FLSEMSTAT.DBGACC
+        * to verify the access source matches the semaphore holder. */
+       flash_request_gsc_semaphore();
+
+#ifdef ALGO_DRY_RUN
+       /* Dry-run mode: no flash operations, just ACK every command.
+        * Used to verify the shared-memory handshake works. */
+       while (1) {
+               while (g_params[curr_buf].status == BUFFER_EMPTY)
+                       ;
+               g_params[curr_buf].status = BUFFER_EMPTY;
+               curr_buf ^= 1;
+       }
+#endif
+
+       while (1) {
+               /* Wait for OpenOCD to signal that buffer is ready */
+               while (g_params[curr_buf].status == BUFFER_EMPTY)
+                       ;
+
+               /* Dispatch command */
+               switch (g_params[curr_buf].cmd) {
+               case CMD_ERASE_AND_PROGRAM:
+                       status = do_erase_and_program(&g_params[curr_buf]);
+                       break;
+               case CMD_PROGRAM:
+                       status = do_program(&g_params[curr_buf]);
+                       break;
+               case CMD_ERASE_SECTORS:
+                       status = do_erase_sectors(&g_params[curr_buf]);
+                       break;
+               default:
+                       status = STATUS_FAILED_UNKNOWN_CMD;
+                       break;
+               }
+
+               if (status != STATUS_OK) {
+                       /* Report error and halt */
+                       g_params[curr_buf].status = status;
+                       flash_clear_gsc_semaphore();
+                       while (1)
+                               ;
+               }
+
+               /* Signal completion */
+               g_params[curr_buf].status = BUFFER_EMPTY;
+
+               /* Swap to the other buffer */
+               curr_buf ^= 1;
+       }
+}
+
+void _exit(int status)
+{
+       (void)status;
+       while (1)
+               ;
+}
diff --git a/contrib/loaders/flash/am13e230x/startup.c 
b/contrib/loaders/flash/am13e230x/startup.c
new file mode 100644
index 0000000000..7e24235940
--- /dev/null
+++ b/contrib/loaders/flash/am13e230x/startup.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/******************************************************************************
+ *
+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Startup code for AM13E230X flash loader algorithm.
+ * OpenOCD jumps directly to entry() after loading the binary into SRAM.
+ *
+ *****************************************************************************/
+
+#include <stdint.h>
+
+extern int main(void);
+
+/* Stack: 100 words = 400 bytes (matches cc26xx) */
+__attribute__((section(".stack"), used))
+static uint32_t stack[100];
+
+/* BSS boundaries from linker */
+extern uint32_t _bss;
+extern uint32_t _ebss;
+/* Stack top from linker */
+extern uint32_t _estack;
+
+/*
+ * Entry point. OpenOCD sets PC here after loading the binary.
+ */
+__attribute__((section(".entry"), naked))
+void entry(void)
+{
+       /* Workaround for ITT instructions */
+       __asm("         NOP");
+       __asm("         NOP");
+       __asm("         NOP");
+       __asm("         NOP");
+
+       /* Switch to privileged Thread mode using MSP.
+        * The previous application (e.g. Zephyr) may have set
+        * CONTROL.nPRIV=1 (unprivileged). Peripheral access
+        * requires privileged mode. */
+       __asm("         mov             r0, #0");
+       __asm("         msr             CONTROL, r0");
+       __asm("         isb");
+
+       /* Initialize stack pointer to top of .stack section */
+       __asm("         ldr             sp, =_estack");
+
+       /* Zero fill the bss segment */
+       __asm("         ldr     r0, =_bss\n"
+                 "             ldr     r1, =_ebss\n"
+                 "             mov     r2, #0\n"
+                 "             .thumb_func\n"
+                 "     zero_loop:\n"
+                 "             cmp             r0, r1\n"
+                 "             it              lt\n"
+                 "             strlt   r2, [r0], #4\n"
+                 "             blt             zero_loop");
+
+       /* Call the application's entry point */
+       __asm("         bl              main");
+
+       /* If we ever return, infinite loop */
+       __asm(" halt_loop:\n"
+                 "             b               halt_loop");
+}

--