G4 does not have SPE, so we make that explicit in the tune files and
since we emulate G4 when building Qemu, we ensure it for qemuppc as
well.
GCC config for powerpc-linux is made to include SPE by default which is
equivalent if the tripet was powerpc-linux*spe, this forces gcc to
configure assembler to enable -mspe by default, when we do that then the
kernel fails to compile with binutils 2.26, since newer assembler is
smart to detect the tlbia instructions are not compatible with SPE and
hence the kernel build breaks rightly. We configure the kernel for G4 as
well where it enables tlbia instrucitons rightly so because it thinks
its being configured for power4. So we keep the options but do not force
-mspe down to assembler as default.
Signed-off-by: Khem Raj <raj.k...@gmail.com>
---
meta/conf/machine/include/tune-ppc7400.inc | 2 +-
meta/conf/machine/qemuppc.conf | 2 ++
...AltiVec-generation-on-powepc-linux-target.patch | 24 ++++++++++++++--------
3 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/meta/conf/machine/include/tune-ppc7400.inc
b/meta/conf/machine/include/tune-ppc7400.inc
index 8bfda56..425e8bd 100644
--- a/meta/conf/machine/include/tune-ppc7400.inc
+++ b/meta/conf/machine/include/tune-ppc7400.inc
@@ -3,7 +3,7 @@ DEFAULTTUNE ?= "ppc7400"
require conf/machine/include/powerpc/arch-powerpc.inc
TUNEVALID[ppc7400] = "Enable ppc7400 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'ppc7400', '
-mcpu=7400', '', d)}"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'ppc7400', ' -mcpu=7400
-mno-spe', '', d)}"
AVAILTUNES += "ppc7400"
TUNE_FEATURES_tune-ppc7400 = "m32 fpu-hard ppc7400 altivec"
diff --git a/meta/conf/machine/qemuppc.conf b/meta/conf/machine/qemuppc.conf
index 85cbbf7..bf0038d 100644
--- a/meta/conf/machine/qemuppc.conf
+++ b/meta/conf/machine/qemuppc.conf
@@ -5,6 +5,8 @@
require conf/machine/include/qemu.inc
require conf/machine/include/tune-ppc7400.inc
+TARGET_CC_KERNEL_ARCH = "-mno-spe"
+
KERNEL_IMAGETYPE = "vmlinux"
SERIAL_CONSOLES = "115200;ttyS0 115200;ttyS1"
diff --git
a/meta/recipes-devtools/gcc/gcc-5.3/0030-Enable-SPE-AltiVec-generation-on-powepc-linux-target.patch
b/meta/recipes-devtools/gcc/gcc-5.3/0030-Enable-SPE-AltiVec-generation-on-powepc-linux-target.patch
index e7ca360..5705187 100644
---
a/meta/recipes-devtools/gcc/gcc-5.3/0030-Enable-SPE-AltiVec-generation-on-powepc-linux-target.patch
+++
b/meta/recipes-devtools/gcc/gcc-5.3/0030-Enable-SPE-AltiVec-generation-on-powepc-linux-target.patch
@@ -19,11 +19,11 @@ Signed-off-by: Alexandru-Cezar Sardan
<alexandru.sar...@freescale.com>
gcc/config.gcc | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
-diff --git a/gcc/config.gcc b/gcc/config.gcc
-index dd0739d..3825bd5 100644
---- a/gcc/config.gcc
-+++ b/gcc/config.gcc
-@@ -2343,7 +2343,14 @@ powerpc-*-rtems*)
+Index: gcc-5.3.0/gcc/config.gcc
+===================================================================
+--- gcc-5.3.0.orig/gcc/config.gcc
++++ gcc-5.3.0/gcc/config.gcc
+@@ -2346,7 +2346,14 @@ powerpc-*-rtems*)
tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-rtems
rs6000/t-ppccomm"
;;
powerpc*-*-linux*)
@@ -39,6 +39,14 @@ index dd0739d..3825bd5 100644
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-ppccomm"
extra_objs="$extra_objs rs6000-linux.o"
---
-2.6.3
-
+Index: gcc-5.3.0/gcc/config/rs6000/linuxspe.h
+===================================================================
+--- gcc-5.3.0.orig/gcc/config/rs6000/linuxspe.h
++++ gcc-5.3.0/gcc/config/rs6000/linuxspe.h
+@@ -27,6 +27,3 @@
+ #undef TARGET_DEFAULT
+ #define TARGET_DEFAULT MASK_STRICT_ALIGN
+ #endif
+-
+-#undef ASM_DEFAULT_SPEC
+-#define ASM_DEFAULT_SPEC "-mppc -mspe -me500"
--
2.7.0
--
_______________________________________________
Openembedded-core mailing list
Openembedded-core@lists.openembedded.org
http://lists.openembedded.org/mailman/listinfo/openembedded-core
