On Thu, Nov 26, 2015 at 8:40 AM, Dmitry Eremin-Solenikov <dbarysh...@gmail.com> wrote: > Import patch fixing a bug that caused ICE when compiling some packages > (e.g. ICU) in Thumb-1 model.
This is ok > > Signed-off-by: Dmitry Eremin-Solenikov <dbarysh...@gmail.com> > --- > meta/recipes-devtools/gcc/gcc-5.2.inc | 1 + > .../gcc/gcc-5.2/0043-fix-arm-thumb.patch | 39 > ++++++++++++++++++++++ > 2 files changed, 40 insertions(+) > create mode 100644 meta/recipes-devtools/gcc/gcc-5.2/0043-fix-arm-thumb.patch > > diff --git a/meta/recipes-devtools/gcc/gcc-5.2.inc > b/meta/recipes-devtools/gcc/gcc-5.2.inc > index a6b385a..e5e92e9 100644 > --- a/meta/recipes-devtools/gcc/gcc-5.2.inc > +++ b/meta/recipes-devtools/gcc/gcc-5.2.inc > @@ -74,6 +74,7 @@ SRC_URI = "\ > file://0040-nativesdk-gcc-support.patch \ > file://0041-handle-target-sysroot-multilib.patch \ > file://0042-cxxflags-for-build.patch \ > + file://0043-fix-arm-thumb.patch \ > " > > BACKPORTS = "" > diff --git a/meta/recipes-devtools/gcc/gcc-5.2/0043-fix-arm-thumb.patch > b/meta/recipes-devtools/gcc/gcc-5.2/0043-fix-arm-thumb.patch > new file mode 100644 > index 0000000..2f262e3 > --- /dev/null > +++ b/meta/recipes-devtools/gcc/gcc-5.2/0043-fix-arm-thumb.patch > @@ -0,0 +1,39 @@ > +Upstream-Status: Accepted > + > +Signed-off-by: Dmitry Eremin-Solenikov <dbarysh...@gmail.com> > +--- > + > +2015-11-25 Vladimir Makarov <vmaka...@redhat.com> > + > + PR rtl-optimization/67954 > + * lra-constraints.c (curr_insn_transform): Add check on scratch > + pseudo when change class to NO_REGS. Add an assert. > + > + > + > +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230894 > 138bc75d-0d04-0410-961f-82ee72b054a4 > +--- > + > +diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c > +index 4670e81..c62bf6a 100644 > +--- a/gcc/lra-constraints.c > ++++ b/gcc/lra-constraints.c > +@@ -3725,7 +3725,8 @@ curr_insn_transform (bool check_only_p) > + assigment pass and the scratch pseudo will be > + spilled. Spilled scratch pseudos are transformed > + back to scratches at the LRA end. */ > +- && lra_former_scratch_operand_p (curr_insn, i)) > ++ && lra_former_scratch_operand_p (curr_insn, i) > ++ && lra_former_scratch_p (REGNO (op))) > + { > + int regno = REGNO (op); > + lra_change_class (regno, NO_REGS, " Change to", true); > +@@ -3734,6 +3735,8 @@ curr_insn_transform (bool check_only_p) > + spilled pseudo as there is only one such insn, the > + current one. */ > + reg_renumber[regno] = -1; > ++ lra_assert (bitmap_single_bit_set_p > ++ (&lra_reg_info[REGNO (op)].insn_bitmap)); > + } > + /* We can do an optional reload. If the pseudo got a hard > + reg, we might improve the code through inheritance. If > -- > 2.6.2 > > -- > _______________________________________________ > Openembedded-core mailing list > Openembedded-core@lists.openembedded.org > http://lists.openembedded.org/mailman/listinfo/openembedded-core -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core