> On Oct 8, 2015, at 9:11 AM, Nicolas Dechesne <nicolas.deche...@linaro.org> > wrote: > > hi, > > I am seeing this error on my board when compilng core-image-x11 based image: > > root@ifc6410:~# glxgears > Running synchronized to the vertical refresh. The framerate should be > approximately the same as the monitor refresh rate. > [ 50.359341] Alignment trap: not handling instruction f4008a1f at > [<b6cf3f84>] > [ 50.364408] Unhandled fault: alignment exception (0x801) at 0x000cd5bc
alignment exception, you say its armv7 which should support unaligned access, so why is this error showing up do you have it disabled in kernel ? > [ 50.371419] pgd = ec024000 > [ 50.377885] [000cd5bc] *pgd=fb85f835 > Bus error > > While I initially thought it was something to do with my kernel or firmware, > I just thought about trying a build with GCCVERSION="4.9.3" and the issue is > gone. > > I was having this issue as soon as EGL/GLES is being used, and I could get it > with both X11 or Weston/Wayland. This is running on IFC6410 (e.g. an ARMv7 > platform). The same images built for ARMv8 (DragonBoard 410c) work fine. > > I am using Mesa Gallium/freedreno for the GPU. I have tried armv7athf-neon > and armv7at-neon, and both show the same issue. > > I would be curious to hear from others using similar platforms , though it is > likely something in mesa/gallium (so possibly in freedreno bits).. Maybe > someone using etnaviv ? Or is anyone building images for qemuarm v7? > > cheers > nico > > -- > _______________________________________________ > Openembedded-core mailing list > Openembedded-core@lists.openembedded.org > http://lists.openembedded.org/mailman/listinfo/openembedded-core
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