From: Mikko Rapeli <mikko.rap...@bmw.de>
Includes fixes:
$ git log --format="%h %s"
6fdf971c9dbf7dac9bea552113fe4694015bbc4d..df31c7ca927242d5d4eee97f93a01e23ff47e332
df31c7ca92 iconv: Accept redundant shift sequences in IBM1364 [BZ #26224]
7df507808c sh: Add sh4 fpu Implies folder
8dc7605665 aarch64: Fix DT_AARCH64_VARIANT_PCS handling [BZ #26798]
48cf525f4b x86: Optimizing memcpy for AMD Zen architecture.
8d730cb25a Reversing calculation of __x86_shared_non_temporal_threshold
4bc9918c99 AArch64: Use __memcpy_simd on Neoverse N2/V1
4722d1fb9d [AArch64] Improve integer memcpy
bea507a3f5 AArch64: Rename IS_ARES to IS_NEOVERSE_N1
d0a5b76902 AArch64: Improve backwards memmove performance
24a30c5959 AArch64: Add optimized Q-register memcpy
88db98fa6e AArch64: Align ENTRY to a cacheline
32965a46ce intl: Handle translation output codesets with suffixes [BZ #26383]
Tested on aarch64 target with CI and long running tests.
Signed-off-by: Mikko Rapeli <mikko.rap...@bmw.de>
Signed-off-by: Steve Sakoman <st...@sakoman.com>
---
meta/recipes-core/glibc/glibc-version.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meta/recipes-core/glibc/glibc-version.inc
b/meta/recipes-core/glibc/glibc-version.inc
index 3bcd336de4..5f726537ff 100644
--- a/meta/recipes-core/glibc/glibc-version.inc
+++ b/meta/recipes-core/glibc/glibc-version.inc
@@ -1,6 +1,6 @@
SRCBRANCH ?= "release/2.31/master"
PV = "2.31+git${SRCPV}"
-SRCREV_glibc ?= "6fdf971c9dbf7dac9bea552113fe4694015bbc4d"
+SRCREV_glibc ?= "df31c7ca927242d5d4eee97f93a01e23ff47e332"
SRCREV_localedef ?= "cd9f958c4c94a638fa7b2b4e21627364f1a1a655"
GLIBC_GIT_URI ?= "git://sourceware.org/git/glibc.git"
--
2.17.1
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