Signed-off-by: Khem Raj <raj.k...@gmail.com>
---
meta/recipes-devtools/gcc/gcc-8.1.inc | 1 +
...003-build-failures-with-with-cpu-xsc.patch | 61 +++++++++++++++++++
2 files changed, 62 insertions(+)
create mode 100644
meta/recipes-devtools/gcc/gcc-8.1/0041-arm-PR-target-86003-build-failures-with-with-cpu-xsc.patch
diff --git a/meta/recipes-devtools/gcc/gcc-8.1.inc
b/meta/recipes-devtools/gcc/gcc-8.1.inc
index d83ba6555e..c5f25f89ac 100644
--- a/meta/recipes-devtools/gcc/gcc-8.1.inc
+++ b/meta/recipes-devtools/gcc/gcc-8.1.inc
@@ -73,6 +73,7 @@ SRC_URI = "\
${BACKPORTS} \
"
BACKPORTS = "\
+
file://0041-arm-PR-target-86003-build-failures-with-with-cpu-xsc.patch \
"
SRC_URI[md5sum] = "65f7c65818dc540b3437605026d329fc"
SRC_URI[sha256sum] =
"1d1866f992626e61349a1ccd0b8d5253816222cdc13390dcfaa74b093aa2b153"
diff --git
a/meta/recipes-devtools/gcc/gcc-8.1/0041-arm-PR-target-86003-build-failures-with-with-cpu-xsc.patch
b/meta/recipes-devtools/gcc/gcc-8.1/0041-arm-PR-target-86003-build-failures-with-with-cpu-xsc.patch
new file mode 100644
index 0000000000..68b8962d47
--- /dev/null
+++
b/meta/recipes-devtools/gcc/gcc-8.1/0041-arm-PR-target-86003-build-failures-with-with-cpu-xsc.patch
@@ -0,0 +1,61 @@
+From 11dc6b9576b78bb7a8d70491beab7ab4de24c9d0 Mon Sep 17 00:00:00 2001
+From: rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Mon, 4 Jun 2018 08:46:04 +0000
+Subject: [PATCH] [arm] PR target/86003 build failures with --with-cpu=xscale
+
+The XScale cpu configuration in GCC has always been somewhat
+non-conforming. Although XScale isn't an architecture (it's simply an
+implementation of ARMv5te), we do by tradition emit a specific
+pre-define for it. We achieve this effect by adding an additional
+feature bit to the xscale CPU definition that isn't part of the base
+architecture.
+
+When I restructured the options last year I overlooked this oddity and
+the result, of course, is that this configuration now fails to build
+as intended.
+
+What happens is that the driver (correctly) constructs an architecture
+for the xscale cpu name (as armv5te) and passes it in addition to the
+CPU name. The backend code, on finding both a cpu and an architecture
+specifies attempts to correlate the two and finds a difference due to
+the additional feature bit and reports an inconsistency (fatally if
+-werror is specified).
+
+I think the best fix to this is to treat the xscale feature bit using
+the same mechanism that we use for other 'quirks' in CPU
+implementations and simply filter it out before comparing the
+capabilities. It has the additional benefit that it's also the
+simplest fix.
+
+ PR target/86003
+ * config/arm/arm-cpus.in (ALL_QUIRKS): Add xscale feature to the list
+ of bits to ignore when comparing architectures.
+
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-8-branch@261141
138bc75d-0d04-0410-961f-82ee72b054a4
+---
+Signed-off-by: Khem Raj <raj.k...@gmail.com>
+Upstream-Status: Backport
+
+ gcc/ChangeLog | 6 ++++++
+ gcc/config/arm/arm-cpus.in | 4 +++-
+ 2 files changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
+index 96972a057e7..545321b0bbe 100644
+--- a/gcc/config/arm/arm-cpus.in
++++ b/gcc/config/arm/arm-cpus.in
+@@ -268,7 +268,9 @@ define fgroup DOTPROD NEON dotprod
+
+ # List of all quirk bits to strip out when comparing CPU features with
+ # architectures.
+-define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd
++# xscale isn't really a 'quirk', but it isn't an architecture either and we
++# need to ignore it for matching purposes.
++define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd
xscale
+
+ # Architecture entries
+ # format:
+--
+2.17.1
+
--
2.17.1
--
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