Li Ming wrote: [..] > > There is a short term fix and a long term fix. The short term fix could > > be to just delete the warning message, or downgrade it to dev_dbg(), for > > now since it is more often a false positive than not. The long term fix, > > and the logic needed to resolve false-positive reports, is to flip the > > capability discovery until *after* it is clear that there is a > > downstream endpoint capable of CXL.cachemem. > > > > Without an endpoint there is no point in reporting that a potentially > > CXL capable port is missing cachemem registers. > > > > So, if you want to send a patch changing that warning to dev_dbg() for > > now I would support that. > > > > I noticed the short term solution been merged, may I know if anyone is > working on the long term solution? If not, I can work on it.
Hi Ming, To my knowledge nobody is working on it, so feel free to take a look. Just note though that if this gets in someone else's critical path they could also produce some patches. I.e. typical Linux kernel task wrangling where the first to post a workable solution usually gets to drive the discussion.
