With GSP-RM handling the majority of the HW programming, NVKM's usual
HALs are more elaborate than necessary, resulting in a fair amount of
duplicated boilerplate.
Adds 'nvkm_rm_gpu' which serves to provide GPU-specific constants and
functions in a more streamlined manner.
This is initially used in subsequent commits to store engine class IDs,
and replace the per-engine/engobj boilerplate with common code for all
GSP-RM supported engines - and is further extended when adding GH100,
GB10x and GB20x support.
Signed-off-by: Ben Skeggs <bske...@nvidia.com>
Reviewed-by: Dave Airlie <airl...@redhat.com>
Reviewed-by: Timur Tabi <tt...@nvidia.com>
Tested-by: Timur Tabi <tt...@nvidia.com>
---
.../gpu/drm/nouveau/include/nvkm/subdev/gsp.h | 6 ++----
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c | 6 +++---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c | 12 +++++++++++-
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c | 6 +++---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c | 6 +++---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h | 7 +++++--
.../gpu/drm/nouveau/nvkm/subdev/gsp/rm/Kbuild | 5 +++++
.../gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c | 9 +++++++++
.../gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c | 9 +++++++++
.../gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c | 9 +++++++++
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h | 16 ++++++++++++++++
.../drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c | 5 -----
.../gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rm.c | 14 ++++++++++++--
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h | 13 ++++++++++++-
.../gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c | 9 +++++++++
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c | 6 +++---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu116.c | 6 +++---
17 files changed, 114 insertions(+), 30 deletions(-)
create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c
create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c
create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c
create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h
create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
b/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
index 3fd279be8340..eeaf72f6add3 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
@@ -209,9 +209,7 @@ struct nvkm_gsp {
u8 tpcs;
} gr;
- const struct nvkm_gsp_rm {
- const struct nvkm_rm_api *api;
- } *rm;
+ struct nvkm_rm *rm;
struct {
struct mutex mutex;
@@ -467,7 +465,7 @@ static inline int
nvkm_gsp_device_event_ctor(struct nvkm_gsp_device *device, u32 handle, u32 id,
nvkm_gsp_event_func func, struct nvkm_gsp_event
*event)
{
- const struct nvkm_gsp_rm *rm = device->object.client->gsp->rm;
+ struct nvkm_rm *rm = device->object.client->gsp->rm;
return rm->api->device->event.ctor(device, handle, id, func, event);
}
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c
index ea2821e7a54e..d7933bfc59fd 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c
@@ -22,7 +22,7 @@
#include "priv.h"
static const struct nvkm_gsp_func
-ad102_gsp_r535_113_01 = {
+ad102_gsp = {
.flcn = &ga102_gsp_flcn,
.fwsec = &ga102_gsp_fwsec,
@@ -40,12 +40,12 @@ ad102_gsp_r535_113_01 = {
.fini = tu102_gsp_fini,
.reset = ga102_gsp_reset,
- .rm = &r535_gsp_rm,
+ .rm.gpu = &ad10x_gpu,
};
static struct nvkm_gsp_fwif
ad102_gsps[] = {
- { 0, tu102_gsp_load, &ad102_gsp_r535_113_01, "535.113.01", true },
+ { 0, tu102_gsp_load, &ad102_gsp, &r535_rm_ga102, "535.113.01", true },
{}
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c
index 78f2a15f0d42..0f8526aa969f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c
@@ -102,6 +102,7 @@ nvkm_gsp_dtor(struct nvkm_subdev *subdev)
gsp->func->dtor(gsp);
nvkm_falcon_dtor(&gsp->falcon);
+ kfree(gsp->rm);
return gsp;
}
@@ -139,7 +140,16 @@ nvkm_gsp_new_(const struct nvkm_gsp_fwif *fwif, struct
nvkm_device *device,
return PTR_ERR(fwif);
gsp->func = fwif->func;
- gsp->rm = gsp->func->rm;
+
+ if (fwif->rm) {
+ gsp->rm = kzalloc(sizeof(*gsp->rm), GFP_KERNEL);
+ if (!gsp->rm)
+ return -ENOMEM;
+
+ gsp->rm->device = device;
+ gsp->rm->gpu = fwif->func->rm.gpu;
+ gsp->rm->api = fwif->rm->api;
+ }
return nvkm_falcon_ctor(gsp->func->flcn, &gsp->subdev,
gsp->subdev.name, 0x110000,
&gsp->falcon);
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c
index d9cdec4810b4..77e3501296c9 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c
@@ -39,7 +39,7 @@ ga100_gsp_flcn = {
};
static const struct nvkm_gsp_func
-ga100_gsp_r535_113_01 = {
+ga100_gsp = {
.flcn = &ga100_gsp_flcn,
.fwsec = &tu102_gsp_fwsec,
@@ -56,12 +56,12 @@ ga100_gsp_r535_113_01 = {
.fini = tu102_gsp_fini,
.reset = tu102_gsp_reset,
- .rm = &r535_gsp_rm,
+ .rm.gpu = &ga100_gpu,
};
static struct nvkm_gsp_fwif
ga100_gsps[] = {
- { 0, tu102_gsp_load, &ga100_gsp_r535_113_01, "535.113.01" },
+ { 0, tu102_gsp_load, &ga100_gsp, &r535_rm_tu102, "535.113.01" },
{ -1, gv100_gsp_nofw, &gv100_gsp },
{}
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c
index 7b8db70f3cb3..709a046d86bf 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c
@@ -150,7 +150,7 @@ ga102_gsp_flcn = {
};
static const struct nvkm_gsp_func
-ga102_gsp_r535_113_01 = {
+ga102_gsp_r535 = {
.flcn = &ga102_gsp_flcn,
.fwsec = &ga102_gsp_fwsec,
@@ -168,7 +168,7 @@ ga102_gsp_r535_113_01 = {
.fini = tu102_gsp_fini,
.reset = ga102_gsp_reset,
- .rm = &r535_gsp_rm,
+ .rm.gpu = &ga1xx_gpu,
};
static const struct nvkm_gsp_func
@@ -178,7 +178,7 @@ ga102_gsp = {
static struct nvkm_gsp_fwif
ga102_gsps[] = {
- { 0, tu102_gsp_load, &ga102_gsp_r535_113_01, "535.113.01" },
+ { 0, tu102_gsp_load, &ga102_gsp_r535, &r535_rm_ga102, "535.113.01" },
{ -1, gv100_gsp_nofw, &ga102_gsp },
{}
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
index e6f0e865848a..de274f6426c1 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
@@ -2,6 +2,7 @@
#ifndef __NVKM_GSP_PRIV_H__
#define __NVKM_GSP_PRIV_H__
#include <subdev/gsp.h>
+#include <rm/gpu.h>
enum nvkm_acr_lsf_id;
int nvkm_gsp_fwsec_frts(struct nvkm_gsp *);
@@ -11,6 +12,7 @@ struct nvkm_gsp_fwif {
int version;
int (*load)(struct nvkm_gsp *, int ver, const struct nvkm_gsp_fwif *);
const struct nvkm_gsp_func *func;
+ const struct nvkm_rm_impl *rm;
const char *ver;
bool enable;
};
@@ -51,7 +53,9 @@ struct nvkm_gsp_func {
int (*fini)(struct nvkm_gsp *, bool suspend);
int (*reset)(struct nvkm_gsp *);
- const struct nvkm_gsp_rm *rm;
+ struct {
+ const struct nvkm_rm_gpu *gpu;
+ } rm;
};
extern const struct nvkm_falcon_func tu102_gsp_flcn;
@@ -73,7 +77,6 @@ void r535_gsp_dtor(struct nvkm_gsp *);
int r535_gsp_oneinit(struct nvkm_gsp *);
int r535_gsp_init(struct nvkm_gsp *);
int r535_gsp_fini(struct nvkm_gsp *, bool suspend);
-extern const struct nvkm_gsp_rm r535_gsp_rm;
int r535_gsp_rmargs_init(struct nvkm_gsp *gsp, bool resume);
int nvkm_gsp_new_(const struct nvkm_gsp_fwif *, struct nvkm_device *, enum
nvkm_subdev_type, int,
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/Kbuild
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/Kbuild
index 1c07740215ec..841b690c0c0a 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/Kbuild
@@ -2,4 +2,9 @@
#
# Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+nvkm-y += nvkm/subdev/gsp/rm/tu1xx.o
+nvkm-y += nvkm/subdev/gsp/rm/ga100.o
+nvkm-y += nvkm/subdev/gsp/rm/ga1xx.o
+nvkm-y += nvkm/subdev/gsp/rm/ad10x.o
+
include $(src)/nvkm/subdev/gsp/rm/r535/Kbuild
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c
new file mode 100644
index 000000000000..1e519bf166dd
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+ */
+#include "gpu.h"
+
+const struct nvkm_rm_gpu
+ad10x_gpu = {
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c
new file mode 100644
index 000000000000..b10e6ff9e9b6
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+ */
+#include "gpu.h"
+
+const struct nvkm_rm_gpu
+ga100_gpu = {
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c
new file mode 100644
index 000000000000..725ccb2c27dc
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+ */
+#include "gpu.h"
+
+const struct nvkm_rm_gpu
+ga1xx_gpu = {
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h
new file mode 100644
index 000000000000..32d87ce2b77d
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+ */
+#ifndef __NVKM_RM_GPU_H__
+#define __NVKM_RM_GPU_H__
+#include "rm.h"
+
+struct nvkm_rm_gpu {
+};
+
+extern const struct nvkm_rm_gpu tu1xx_gpu;
+extern const struct nvkm_rm_gpu ga100_gpu;
+extern const struct nvkm_rm_gpu ga1xx_gpu;
+extern const struct nvkm_rm_gpu ad10x_gpu;
+#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c
index 48af5d8d22e8..8ca0f99ccbac 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c
@@ -44,11 +44,6 @@
extern struct dentry *nouveau_debugfs_root;
-const struct nvkm_gsp_rm
-r535_gsp_rm = {
- .api = &r535_rm,
-};
-
static void
r535_gsp_msgq_work(struct work_struct *work)
{
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rm.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rm.c
index 39cc3d0c740c..3c17b75b5e37 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rm.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rm.c
@@ -4,11 +4,21 @@
*/
#include <rm/rm.h>
-const struct nvkm_rm_api
-r535_rm = {
+static const struct nvkm_rm_api
+r535_api = {
.rpc = &r535_rpc,
.ctrl = &r535_ctrl,
.alloc = &r535_alloc,
.client = &r535_client,
.device = &r535_device,
};
+
+const struct nvkm_rm_impl
+r535_rm_tu102 = {
+ .api = &r535_api,
+};
+
+const struct nvkm_rm_impl
+r535_rm_ga102 = {
+ .api = &r535_api,
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h
index 20841305fa55..41d4ed70fc10 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h
@@ -6,6 +6,16 @@
#ifndef __NVKM_RM_H__
#define __NVKM_RM_H__
+struct nvkm_rm_impl {
+ const struct nvkm_rm_api *api;
+};
+
+struct nvkm_rm {
+ struct nvkm_device *device;
+ const struct nvkm_rm_gpu *gpu;
+ const struct nvkm_rm_api *api;
+};
+
struct nvkm_rm_api {
const struct nvkm_rm_api_rpc {
void *(*get)(struct nvkm_gsp *, u32 fn, u32 argc);
@@ -45,7 +55,8 @@ struct nvkm_rm_api {
} *device;
};
-extern const struct nvkm_rm_api r535_rm;
+extern const struct nvkm_rm_impl r535_rm_tu102;
+extern const struct nvkm_rm_impl r535_rm_ga102;
extern const struct nvkm_rm_api_rpc r535_rpc;
extern const struct nvkm_rm_api_ctrl r535_ctrl;
extern const struct nvkm_rm_api_alloc r535_alloc;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c
new file mode 100644
index 000000000000..d455a4f19854
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+ */
+#include "gpu.h"
+
+const struct nvkm_rm_gpu
+tu1xx_gpu = {
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
index 451d3e588d26..fef9c4444017 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
@@ -268,7 +268,7 @@ tu102_gsp_flcn = {
};
static const struct nvkm_gsp_func
-tu102_gsp_r535_113_01 = {
+tu102_gsp = {
.flcn = &tu102_gsp_flcn,
.fwsec = &tu102_gsp_fwsec,
@@ -285,7 +285,7 @@ tu102_gsp_r535_113_01 = {
.fini = tu102_gsp_fini,
.reset = tu102_gsp_reset,
- .rm = &r535_gsp_rm,
+ .rm.gpu = &tu1xx_gpu,
};
static int
@@ -336,7 +336,7 @@ tu102_gsp_load(struct nvkm_gsp *gsp, int ver, const struct
nvkm_gsp_fwif *fwif)
static struct nvkm_gsp_fwif
tu102_gsps[] = {
- { 0, tu102_gsp_load, &tu102_gsp_r535_113_01, "535.113.01" },
+ { 0, tu102_gsp_load, &tu102_gsp, &r535_rm_tu102, "535.113.01" },
{ -1, gv100_gsp_nofw, &gv100_gsp },
{}
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu116.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu116.c
index 1bc806a18010..5f279813626f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu116.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu116.c
@@ -22,7 +22,7 @@
#include "priv.h"
static const struct nvkm_gsp_func
-tu116_gsp_r535_113_01 = {
+tu116_gsp = {
.flcn = &tu102_gsp_flcn,
.fwsec = &tu102_gsp_fwsec,
@@ -39,12 +39,12 @@ tu116_gsp_r535_113_01 = {
.fini = tu102_gsp_fini,
.reset = tu102_gsp_reset,
- .rm = &r535_gsp_rm,
+ .rm.gpu = &tu1xx_gpu,
};
static struct nvkm_gsp_fwif
tu116_gsps[] = {
- { 0, tu102_gsp_load, &tu116_gsp_r535_113_01, "535.113.01" },
+ { 0, tu102_gsp_load, &tu116_gsp, &r535_rm_tu102, "535.113.01" },
{ -1, gv100_gsp_nofw, &gv100_gsp },
{}
};
--
2.49.0
