On Wed, May 07, 2025 at 10:52:38PM +0900, Alexandre Courbot wrote:
> A page of system memory is reserved so sysmembar can perform a read on
NIT: Use imperative mood.
> it if a system write occurred since the last flush. Do this early as it
> can be required to e.g. reset the GPU falcons.
>
> Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
> ---
> drivers/gpu/nova-core/gpu.rs | 45
> +++++++++++++++++++++++++++++++++++++++++--
> drivers/gpu/nova-core/regs.rs | 10 ++++++++++
> 2 files changed, 53 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
> index
> a9fcf74717791dc7e23678869bf84f61e51873e2..c338da69ecbc2200f1ef3061a4d62971b021e3eb
> 100644
> --- a/drivers/gpu/nova-core/gpu.rs
> +++ b/drivers/gpu/nova-core/gpu.rs
> @@ -3,6 +3,7 @@
> use kernel::{device, devres::Devres, error::code::*, pci, prelude::*};
>
> use crate::devinit;
> +use crate::dma::DmaObject;
> use crate::driver::Bar0;
> use crate::firmware::Firmware;
> use crate::regs;
> @@ -158,12 +159,32 @@ fn new(bar: &Bar0) -> Result<Spec> {
> }
>
> /// Structure holding the resources required to operate the GPU.
> -#[pin_data]
> +#[pin_data(PinnedDrop)]
> pub(crate) struct Gpu {
> spec: Spec,
> /// MMIO mapping of PCI BAR 0
> bar: Devres<Bar0>,
> fw: Firmware,
> + // System memory page required for flushing all pending GPU-side memory
> writes done through
> + // PCIE into system memory.
Please make this a doc-comment.
