On Fri, 26 Jul 2024 14:38:26 +1000
Ben Skeggs <bske...@nvidia.com> wrote:
With some trivial coding style fixed,
Reviewed-by: Zhi Wang <z...@nvidia.com>
> The struct itself lives in nouveau_channel already, just use that.
>
> Signed-off-by: Ben Skeggs <bske...@nvidia.com>
> ---
> drivers/gpu/drm/nouveau/dispnv04/crtc.c | 4 +--
> drivers/gpu/drm/nouveau/nouveau_bo0039.c | 4 +--
> drivers/gpu/drm/nouveau/nouveau_bo5039.c | 4 +--
> drivers/gpu/drm/nouveau/nouveau_bo74c1.c | 2 +-
> drivers/gpu/drm/nouveau/nouveau_bo85b5.c | 2 +-
> drivers/gpu/drm/nouveau/nouveau_bo9039.c | 4 +--
> drivers/gpu/drm/nouveau/nouveau_bo90b5.c | 2 +-
> drivers/gpu/drm/nouveau/nouveau_boa0b5.c | 4 +--
> drivers/gpu/drm/nouveau/nouveau_chan.c | 41
> ++++++++++++------------ drivers/gpu/drm/nouveau/nouveau_chan.h |
> 3 +- drivers/gpu/drm/nouveau/nouveau_dmem.c | 4 +--
> drivers/gpu/drm/nouveau/nouveau_drm.c | 3 +-
> drivers/gpu/drm/nouveau/nouveau_gem.c | 14 ++++----
> drivers/gpu/drm/nouveau/nv04_fence.c | 2 +-
> drivers/gpu/drm/nouveau/nv10_fence.c | 2 +-
> drivers/gpu/drm/nouveau/nv17_fence.c | 4 +--
> drivers/gpu/drm/nouveau/nv84_fence.c | 4 +--
> drivers/gpu/drm/nouveau/nvc0_fence.c | 4 +--
> 18 files changed, 53 insertions(+), 54 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
> b/drivers/gpu/drm/nouveau/dispnv04/crtc.c index
> 33ff21d40cfb..67146f1e8482 100644 ---
> a/drivers/gpu/drm/nouveau/dispnv04/crtc.c +++
> b/drivers/gpu/drm/nouveau/dispnv04/crtc.c @@ -1115,7 +1115,7 @@
> nv04_page_flip_emit(struct nouveau_channel *chan, struct
> nouveau_fence_chan *fctx = chan->fence; struct nouveau_drm *drm =
> chan->cli->drm; struct drm_device *dev = drm->dev;
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> unsigned long flags;
> int ret;
>
> @@ -1173,7 +1173,7 @@ nv04_crtc_page_flip(struct drm_crtc *crtc,
> struct drm_framebuffer *fb, if (!chan)
> return -ENODEV;
> cli = chan->cli;
> - push = chan->chan.push;
> + push = &chan->chan.push;
>
> s = kzalloc(sizeof(*s), GFP_KERNEL);
> if (!s)
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo0039.c
> b/drivers/gpu/drm/nouveau/nouveau_bo0039.c index
> 2babc6c47241..0b6758e024a1 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_bo0039.c +++
> b/drivers/gpu/drm/nouveau/nouveau_bo0039.c @@ -47,7 +47,7 @@ int
> nv04_bo_move_m2mf(struct nouveau_channel *chan, struct
> ttm_buffer_object *bo, struct ttm_resource *old_reg, struct
> ttm_resource *new_reg) {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> u32 src_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, old_reg);
> u32 src_offset = old_reg->start << PAGE_SHIFT;
> u32 dst_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, new_reg);
> @@ -96,7 +96,7 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan,
> struct ttm_buffer_object *bo, int
> nv04_bo_move_init(struct nouveau_channel *chan, u32 handle)
> {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret;
>
> ret = PUSH_WAIT(push, 4);
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo5039.c
> b/drivers/gpu/drm/nouveau/nouveau_bo5039.c index
> 0a6b1fce1108..c3de17548d97 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_bo5039.c +++
> b/drivers/gpu/drm/nouveau/nouveau_bo5039.c @@ -40,7 +40,7 @@
> nv50_bo_move_m2mf(struct nouveau_channel *chan, struct
> ttm_buffer_object *bo, struct ttm_resource *old_reg, struct
> ttm_resource *new_reg) { struct nouveau_mem *mem =
> nouveau_mem(old_reg);
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> u64 length = new_reg->size;
> u64 src_offset = mem->vma[0].addr;
> u64 dst_offset = mem->vma[1].addr;
> @@ -136,7 +136,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan,
> struct ttm_buffer_object *bo, int
> nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
> {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret;
>
> ret = PUSH_WAIT(push, 6);
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo74c1.c
> b/drivers/gpu/drm/nouveau/nouveau_bo74c1.c index
> 9b7ba31fae13..e6ef79de2498 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_bo74c1.c +++
> b/drivers/gpu/drm/nouveau/nouveau_bo74c1.c @@ -37,7 +37,7 @@
> nv84_bo_move_exec(struct nouveau_channel *chan, struct
> ttm_buffer_object *bo, struct ttm_resource *old_reg, struct
> ttm_resource *new_reg) { struct nouveau_mem *mem =
> nouveau_mem(old_reg);
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret;
>
> ret = PUSH_WAIT(push, 7);
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo85b5.c
> b/drivers/gpu/drm/nouveau/nouveau_bo85b5.c index
> a15a38a87a95..c4861d073ad4 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_bo85b5.c +++
> b/drivers/gpu/drm/nouveau/nouveau_bo85b5.c @@ -41,7 +41,7 @@
> nva3_bo_move_copy(struct nouveau_channel *chan, struct
> ttm_buffer_object *bo, struct ttm_resource *old_reg, struct
> ttm_resource *new_reg) { struct nouveau_mem *mem =
> nouveau_mem(old_reg);
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> u64 src_offset = mem->vma[0].addr;
> u64 dst_offset = mem->vma[1].addr;
> u32 page_count = PFN_UP(new_reg->size);
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo9039.c
> b/drivers/gpu/drm/nouveau/nouveau_bo9039.c index
> d2bb2687d401..ad82269c7725 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_bo9039.c +++
> b/drivers/gpu/drm/nouveau/nouveau_bo9039.c @@ -38,7 +38,7 @@ int
> nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct
> ttm_buffer_object *bo, struct ttm_resource *old_reg, struct
> ttm_resource *new_reg) {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> struct nouveau_mem *mem = nouveau_mem(old_reg);
> u64 src_offset = mem->vma[0].addr;
> u64 dst_offset = mem->vma[1].addr;
> @@ -86,7 +86,7 @@ nvc0_bo_move_m2mf(struct nouveau_channel *chan,
> struct ttm_buffer_object *bo, int
> nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle)
> {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret;
>
> ret = PUSH_WAIT(push, 2);
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo90b5.c
> b/drivers/gpu/drm/nouveau/nouveau_bo90b5.c index
> 4618f4f5ab56..5eaeef9d25e4 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_bo90b5.c +++
> b/drivers/gpu/drm/nouveau/nouveau_bo90b5.c @@ -34,7 +34,7 @@
> nvc0_bo_move_copy(struct nouveau_channel *chan, struct
> ttm_buffer_object *bo, struct ttm_resource *old_reg, struct
> ttm_resource *new_reg) { struct nouveau_mem *mem =
> nouveau_mem(old_reg);
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> u64 src_offset = mem->vma[0].addr;
> u64 dst_offset = mem->vma[1].addr;
> u32 page_count = PFN_UP(new_reg->size);
> diff --git a/drivers/gpu/drm/nouveau/nouveau_boa0b5.c
> b/drivers/gpu/drm/nouveau/nouveau_boa0b5.c index
> 07a5c6302c98..dff2ae0e1e45 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_boa0b5.c +++
> b/drivers/gpu/drm/nouveau/nouveau_boa0b5.c @@ -39,7 +39,7 @@
> nve0_bo_move_copy(struct nouveau_channel *chan, struct
> ttm_buffer_object *bo, struct ttm_resource *old_reg, struct
> ttm_resource *new_reg) { struct nouveau_mem *mem =
> nouveau_mem(old_reg);
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret;
>
> ret = PUSH_WAIT(push, 10);
> @@ -78,7 +78,7 @@ nve0_bo_move_copy(struct nouveau_channel *chan,
> struct ttm_buffer_object *bo, int
> nve0_bo_move_init(struct nouveau_channel *chan, u32 handle)
> {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret;
>
> ret = PUSH_WAIT(push, 2);
> diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c
> b/drivers/gpu/drm/nouveau/nouveau_chan.c index
> e95b8092dae3..02eff65d7231 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_chan.c +++
> b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -117,24 +117,24 @@
> nouveau_channel_del(struct nouveau_channel **pchan) static void
> nouveau_channel_kick(struct nvif_push *push)
> {
> - struct nouveau_channel *chan = container_of(push,
> typeof(*chan), chan._push);
> - chan->dma.cur = chan->dma.cur + (chan->chan._push.cur -
> chan->chan._push.bgn);
> + struct nouveau_channel *chan = container_of(push,
> typeof(*chan), chan.push);
May one extra empty line after the defs. So does
nouveau_channel_wait().
> + chan->dma.cur = chan->dma.cur + (chan->chan.push.cur -
> chan->chan.push.bgn); FIRE_RING(chan);
> - chan->chan._push.bgn = chan->chan._push.cur;
> + chan->chan.push.bgn = chan->chan.push.cur;
> }
>
> static int
> nouveau_channel_wait(struct nvif_push *push, u32 size)
> {
> - struct nouveau_channel *chan = container_of(push,
> typeof(*chan), chan._push);
> + struct nouveau_channel *chan = container_of(push,
> typeof(*chan), chan.push); int ret;
> - chan->dma.cur = chan->dma.cur + (chan->chan._push.cur -
> chan->chan._push.bgn);
> + chan->dma.cur = chan->dma.cur + (chan->chan.push.cur -
> chan->chan.push.bgn); ret = RING_SPACE(chan, size);
> if (ret == 0) {
> - chan->chan._push.bgn =
> chan->chan._push.mem.object.map.ptr;
> - chan->chan._push.bgn = chan->chan._push.bgn +
> chan->dma.cur;
> - chan->chan._push.cur = chan->chan._push.bgn;
> - chan->chan._push.end = chan->chan._push.bgn + size;
> + chan->chan.push.bgn =
> chan->chan.push.mem.object.map.ptr;
> + chan->chan.push.bgn = chan->chan.push.bgn +
> chan->dma.cur;
> + chan->chan.push.cur = chan->chan.push.bgn;
> + chan->chan.push.end = chan->chan.push.bgn + size;
> }
> return ret;
> }
> @@ -176,13 +176,12 @@ nouveau_channel_prep(struct nouveau_cli *cli,
> return ret;
> }
>
> - chan->chan._push.mem.object.parent = cli->base.object.parent;
> - chan->chan._push.mem.object.client = &cli->base;
> - chan->chan._push.mem.object.name = "chanPush";
> - chan->chan._push.mem.object.map.ptr =
> chan->push.buffer->kmap.virtual;
> - chan->chan._push.wait = nouveau_channel_wait;
> - chan->chan._push.kick = nouveau_channel_kick;
> - chan->chan.push = &chan->chan._push;
> + chan->chan.push.mem.object.parent = cli->base.object.parent;
> + chan->chan.push.mem.object.client = &cli->base;
> + chan->chan.push.mem.object.name = "chanPush";
> + chan->chan.push.mem.object.map.ptr =
> chan->push.buffer->kmap.virtual;
> + chan->chan.push.wait = nouveau_channel_wait;
> + chan->chan.push.kick = nouveau_channel_kick;
>
> /* create dma object covering the *entire* memory space that
> the
> * pushbuf lives in, this is because the GEM code requires
> that @@ -461,12 +460,12 @@ nouveau_channel_init(struct
> nouveau_channel *chan, u32 vram, u32 gart) chan->dma.cur =
> chan->dma.put; chan->dma.free = chan->dma.max - chan->dma.cur;
>
> - ret = PUSH_WAIT(chan->chan.push, NOUVEAU_DMA_SKIPS);
> + ret = PUSH_WAIT(&chan->chan.push, NOUVEAU_DMA_SKIPS);
> if (ret)
> return ret;
>
> for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
> - PUSH_DATA(chan->chan.push, 0x00000000);
> + PUSH_DATA(&chan->chan.push, 0x00000000);
>
> /* allocate software object class (used for fences on <=
> nv05) */ if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) {
> @@ -476,12 +475,12 @@ nouveau_channel_init(struct nouveau_channel
> *chan, u32 vram, u32 gart) if (ret)
> return ret;
>
> - ret = PUSH_WAIT(chan->chan.push, 2);
> + ret = PUSH_WAIT(&chan->chan.push, 2);
> if (ret)
> return ret;
>
> - PUSH_NVSQ(chan->chan.push, NV_SW, 0x0000,
> chan->nvsw.handle);
> - PUSH_KICK(chan->chan.push);
> + PUSH_NVSQ(&chan->chan.push, NV_SW, 0x0000,
> chan->nvsw.handle);
> + PUSH_KICK(&chan->chan.push);
> }
>
> /* initialise synchronisation */
> diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.h
> b/drivers/gpu/drm/nouveau/nouveau_chan.h index
> 3ce9832c9528..016f668c0bc1 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_chan.h +++
> b/drivers/gpu/drm/nouveau/nouveau_chan.h @@ -8,8 +8,7 @@ struct
> nvif_device;
> struct nouveau_channel {
> struct {
> - struct nvif_push _push;
> - struct nvif_push *push;
> + struct nvif_push push;
> } chan;
>
> struct nouveau_cli *cli;
> diff --git a/drivers/gpu/drm/nouveau/nouveau_dmem.c
> b/drivers/gpu/drm/nouveau/nouveau_dmem.c index
> 7b3b8f4630a2..d2604d0d2d07 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_dmem.c +++
> b/drivers/gpu/drm/nouveau/nouveau_dmem.c @@ -443,7 +443,7 @@
> nvc0b5_migrate_copy(struct nouveau_drm *drm, u64 npages, enum
> nouveau_aper dst_aper, u64 dst_addr, enum nouveau_aper src_aper, u64
> src_addr) {
> - struct nvif_push *push = drm->dmem->migrate.chan->chan.push;
> + struct nvif_push *push = &drm->dmem->migrate.chan->chan.push;
> u32 launch_dma = 0;
> int ret;
>
> @@ -516,7 +516,7 @@ static int
> nvc0b5_migrate_clear(struct nouveau_drm *drm, u32 length,
> enum nouveau_aper dst_aper, u64 dst_addr)
> {
> - struct nvif_push *push = drm->dmem->migrate.chan->chan.push;
> + struct nvif_push *push = &drm->dmem->migrate.chan->chan.push;
> u32 launch_dma = 0;
> int ret;
>
> diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c
> b/drivers/gpu/drm/nouveau/nouveau_drm.c index
> ca63d13efb25..ac7c60fb14d3 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_drm.c +++
> b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -382,7 +382,8 @@
> nouveau_accel_gr_init(struct nouveau_drm *drm) }
>
> if (ret == 0) {
> - struct nvif_push *push =
> drm->channel->chan.push;
> + struct nvif_push *push =
> &drm->channel->chan.push; +
> ret = PUSH_WAIT(push, 8);
> if (ret == 0) {
> if (device->info.chipset >= 0x11) {
> diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c
> b/drivers/gpu/drm/nouveau/nouveau_gem.c index
> 7b6f611a28b1..4a8108f33319 100644 ---
> a/drivers/gpu/drm/nouveau/nouveau_gem.c +++
> b/drivers/gpu/drm/nouveau/nouveau_gem.c @@ -871,7 +871,7 @@
> nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data, }
> } else
> if (drm->client.device.info.chipset >= 0x25) {
> - ret = PUSH_WAIT(chan->chan.push, req->nr_push * 2);
> + ret = PUSH_WAIT(&chan->chan.push, req->nr_push * 2);
> if (ret) {
> NV_PRINTK(err, cli, "cal_space: %d\n", ret);
> goto out;
> @@ -881,11 +881,11 @@ nouveau_gem_ioctl_pushbuf(struct drm_device
> *dev, void *data, struct nouveau_bo *nvbo = (void *)(unsigned long)
> bo[push[i].bo_index].user_priv;
>
> - PUSH_CALL(chan->chan.push, nvbo->offset +
> push[i].offset);
> - PUSH_DATA(chan->chan.push, 0);
> + PUSH_CALL(&chan->chan.push, nvbo->offset +
> push[i].offset);
> + PUSH_DATA(&chan->chan.push, 0);
> }
> } else {
> - ret = PUSH_WAIT(chan->chan.push, req->nr_push * (2 +
> NOUVEAU_DMA_SKIPS));
> + ret = PUSH_WAIT(&chan->chan.push, req->nr_push * (2
> + NOUVEAU_DMA_SKIPS)); if (ret) {
> NV_PRINTK(err, cli, "jmp_space: %d\n", ret);
> goto out;
> @@ -914,10 +914,10 @@ nouveau_gem_ioctl_pushbuf(struct drm_device
> *dev, void *data, push[i].length - 8) / 4, cmd);
> }
>
> - PUSH_JUMP(chan->chan.push, nvbo->offset +
> push[i].offset);
> - PUSH_DATA(chan->chan.push, 0);
> + PUSH_JUMP(&chan->chan.push, nvbo->offset +
> push[i].offset);
> + PUSH_DATA(&chan->chan.push, 0);
> for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
> - PUSH_DATA(chan->chan.push, 0);
> + PUSH_DATA(&chan->chan.push, 0);
> }
> }
>
> diff --git a/drivers/gpu/drm/nouveau/nv04_fence.c
> b/drivers/gpu/drm/nouveau/nv04_fence.c index
> cdbc75e3d1f6..fa5c6029f783 100644 ---
> a/drivers/gpu/drm/nouveau/nv04_fence.c +++
> b/drivers/gpu/drm/nouveau/nv04_fence.c @@ -39,7 +39,7 @@ struct
> nv04_fence_priv { static int
> nv04_fence_emit(struct nouveau_fence *fence)
> {
> - struct nvif_push *push =
> unrcu_pointer(fence->channel)->chan.push;
> + struct nvif_push *push =
> &unrcu_pointer(fence->channel)->chan.push; int ret = PUSH_WAIT(push,
> 2); if (ret == 0) {
> PUSH_NVSQ(push, NV_SW, 0x0150, fence->base.seqno);
> diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c
> b/drivers/gpu/drm/nouveau/nv10_fence.c index
> 1a53b8b80467..8c73f40e3bda 100644 ---
> a/drivers/gpu/drm/nouveau/nv10_fence.c +++
> b/drivers/gpu/drm/nouveau/nv10_fence.c @@ -32,7 +32,7 @@
> int
> nv10_fence_emit(struct nouveau_fence *fence)
> {
> - struct nvif_push *push = fence->channel->chan.push;
> + struct nvif_push *push = &fence->channel->chan.push;
> int ret = PUSH_WAIT(push, 2);
> if (ret == 0) {
> PUSH_MTHD(push, NV06E, SET_REFERENCE,
> fence->base.seqno); diff --git a/drivers/gpu/drm/nouveau/nv17_fence.c
> b/drivers/gpu/drm/nouveau/nv17_fence.c index
> 51fcac894146..d09bfd11369f 100644 ---
> a/drivers/gpu/drm/nouveau/nv17_fence.c +++
> b/drivers/gpu/drm/nouveau/nv17_fence.c @@ -39,8 +39,8 @@
> nv17_fence_sync(struct nouveau_fence *fence, struct nouveau_cli *cli
> = prev->cli; struct nv10_fence_priv *priv = cli->drm->fence;
> struct nv10_fence_chan *fctx = chan->fence;
> - struct nvif_push *ppush = prev->chan.push;
> - struct nvif_push *npush = chan->chan.push;
> + struct nvif_push *ppush = &prev->chan.push;
> + struct nvif_push *npush = &chan->chan.push;
> u32 value;
> int ret;
>
> diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c
> b/drivers/gpu/drm/nouveau/nv84_fence.c index
> 1f5a02a9239f..aa7dd0c5d917 100644 ---
> a/drivers/gpu/drm/nouveau/nv84_fence.c +++
> b/drivers/gpu/drm/nouveau/nv84_fence.c @@ -35,7 +35,7 @@
> static int
> nv84_fence_emit32(struct nouveau_channel *chan, u64 virtual, u32
> sequence) {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret = PUSH_WAIT(push, 8);
> if (ret == 0) {
> PUSH_MTHD(push, NV826F, SET_CONTEXT_DMA_SEMAPHORE,
> chan->vram.handle); @@ -58,7 +58,7 @@ nv84_fence_emit32(struct
> nouveau_channel *chan, u64 virtual, u32 sequence) static int
> nv84_fence_sync32(struct nouveau_channel *chan, u64 virtual, u32
> sequence) {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret = PUSH_WAIT(push, 7);
> if (ret == 0) {
> PUSH_MTHD(push, NV826F, SET_CONTEXT_DMA_SEMAPHORE,
> chan->vram.handle); diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c
> b/drivers/gpu/drm/nouveau/nvc0_fence.c index
> e1461c0b0779..a5e98d0d4217 100644 ---
> a/drivers/gpu/drm/nouveau/nvc0_fence.c +++
> b/drivers/gpu/drm/nouveau/nvc0_fence.c @@ -34,7 +34,7 @@
> static int
> nvc0_fence_emit32(struct nouveau_channel *chan, u64 virtual, u32
> sequence) {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret = PUSH_WAIT(push, 6);
> if (ret == 0) {
> PUSH_MTHD(push, NV906F, SEMAPHOREA,
> @@ -57,7 +57,7 @@ nvc0_fence_emit32(struct nouveau_channel *chan, u64
> virtual, u32 sequence) static int
> nvc0_fence_sync32(struct nouveau_channel *chan, u64 virtual, u32
> sequence) {
> - struct nvif_push *push = chan->chan.push;
> + struct nvif_push *push = &chan->chan.push;
> int ret = PUSH_WAIT(push, 5);
> if (ret == 0) {
> PUSH_MTHD(push, NV906F, SEMAPHOREA,
