On 10/23/2015 04:59 AM, David Miller wrote:
From: Tom Lendacky <thomas.lenda...@amd.com>
Date: Wed, 21 Oct 2015 15:37:05 -0500
The code currently uses the lightweight dma_wmb barrier before updating
the current descriptor count. Under heavy load, the Tx cleanup routine
was seeing the updated current descriptor count before the updated
descriptor information. As a result, the Tx descriptor was being cleaned
up before it was used because it was not "owned" by the hardware yet,
resulting in a Tx queue hang.
Using the wmb barrier insures that the descriptor is updated before the
descriptor counter preventing the Tx queue hang. For extra insurance,
the Tx cleanup routine is changed to grab the current decriptor count on
entry and uses that initial value in the processing loop rather than
trying to chase the current value.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
Tested-by: Christoffer Dall <christoffer.d...@linaro.org>
Applied, thanks.
Hi David,
Can you queue this up for stable? It is applicable to 4.1 and 4.2.
Thanks,
Tom
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