From: Russell King <rmk+ker...@arm.linux.org.uk>
Date: Mon, 14 Sep 2015 13:09:04 +0100
> Commit 54d792f257c6 ("net: dsa: Centralise global and port setup
> code into mv88e6xxx.") merged in the 4.2 merge window broke the link
> speed forcing for the CPU port of Marvell DSA switches. The original
> code was:
>
> /* MAC Forcing register: don't force link, speed, duplex
> * or flow control state to any particular values on physical
> * ports, but force the CPU port and all DSA ports to 1000 Mb/s
> * full duplex.
> */
> if (dsa_is_cpu_port(ds, p) || ds->dsa_port_mask & (1 << p))
> REG_WRITE(addr, 0x01, 0x003e);
> else
> REG_WRITE(addr, 0x01, 0x0003);
>
> but the new code does a read-modify-write:
>
> reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL);
> if (dsa_is_cpu_port(ds, port) ||
> ds->dsa_port_mask & (1 << port)) {
> reg |= PORT_PCS_CTRL_FORCE_LINK |
> PORT_PCS_CTRL_LINK_UP |
> PORT_PCS_CTRL_DUPLEX_FULL |
> PORT_PCS_CTRL_FORCE_DUPLEX;
> if (mv88e6xxx_6065_family(ds))
> reg |= PORT_PCS_CTRL_100;
> else
> reg |= PORT_PCS_CTRL_1000;
>
> The link speed in the PCS control register is a two bit field. Forcing
> the link speed in this way doesn't ensure that the bit field is set to
> the correct value - on the hardware I have here, the speed bitfield
> remains set to 0x03, resulting in the speed not being forced to gigabit.
>
> We must clear both bits before forcing the link speed.
>
> Fixes: 54d792f257c6 ("net: dsa: Centralise global and port setup code into
> mv88e6xxx.")
> Signed-off-by: Russell King <rmk+ker...@arm.linux.org.uk>
This code looks really different now in the current tree, can you
please respin?
Thanks.
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