Hi Scott The device tree already has a brg-frequency property in qe node which is the value of BRGCLK. The function get_brg_clk uses this property to find the value of BRGCLK. In case this value is 0(some older u-boots populate bus-frequency property of qe and not the brg-frequency), get_brg_clk uses bus-frequency/2 as BRGCLK.
With Regards Poonam -----Original Message----- From: Wood Scott Sent: Friday, January 25, 2008 1:42 AM To: Aggrwal Poonam Cc: Gala Kumar; [EMAIL PROTECTED]; [EMAIL PROTECTED]; netdev@vger.kernel.org; [EMAIL PROTECTED]; [EMAIL PROTECTED]; Barkowski Michael; Cutler Richard; Tabi Timur; Kalra Ashish Subject: Re: [PATCH UCC TDM 3/3 ] Modified Documentation to explain dtsentries for TDM driver On Thu, Jan 24, 2008 at 10:24:13AM +0530, Poonam_Aggrwal-b10812 wrote: > + ix) Baud Rate Generator (BRG) > + > + Required properties: > + - compatible : shpuld be "fsl,cpm-brg" > + - fsl,brg-sources : define the input clock for all 16 BRGs. The input > + clock source could be 1 to 24 for CLK1 to CLK24. Zero means that the > + particular BRG will be driven by QE clock(BRGCLK). Should also have a clock-frequency property to specify what BRGCLK is. -Scott -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
