On Sat, 2007-08-09 at 09:42 -0700, Mandeep Singh Baines wrote: > Reading the "interrupt pending" register would require an MMIO read. > MMIO reads are very expensive. In some systems the latency of an MMIO > read can be 1000x that of an L1 cache access.
Indeed. > However, work_done() doesn't have to be inefficient. For newer > devices you can implement work_done() without an MMIO read by polling > the next ring entry status in memory or some other mechanism. Since > PCI is coherent, acceses to this memory location could be cached > after the first miss. For architectures where PCI is not coherent you'd > have to go to memory for every poll. So for these architectures has_work() > will be moderately expensive (memory access) even when has_work() does > not require an MMIO read. This might affect home routers: not sure if MIPS or > ARM have coherent PCI. I think the effect would be clearly experimentally observable in smaller devices e.g the Geode you seem to be experimenting on. One other suggestion i made in the paper is to something along the lines of cached_irq_mask for the i8259 cheers, jamal - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
