> + the bridge port flags for the CPU port. The assumption is that address > + learning should be statically enabled (if supported by the hardware) on the > + CPU port, and flooding towards the CPU port should also be enabled, in lack > + of an explicit address filtering mechanism in the DSA core.
Hi Vladimir
"in lack of" is a bit odd wording. Maybe "due to a lack of"
Reviewed-by: Andrew Lunn <and...@lunn.ch>
Andrew
