Hi Michael,
On 20.01.2021 21:43, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
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>
> If the MII interface is used, the PHY is the clock master, thus don't
> set the clock rate. On Zynq-7000, this will prevent the following
> warning:
> macb e000b000.ethernet eth0: unable to generate target frequency: 25000000
> Hz
>
Since in this case the PHY provides the TX clock and it provides the proper
rate based on link speed, the MACB driver should not handle the bp->tx_clk
at all (MACB driver uses this clock only for setting the proper rate on it
based on link speed). So, I believe the proper fix would be to not pass the
tx_clk at all in device tree. This clock is optional for MACB driver.
Thank you,
Claudiu Beznea
> Signed-off-by: Michael Walle <mich...@walle.cc>
> ---
> drivers/net/ethernet/cadence/macb_main.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/ethernet/cadence/macb_main.c
> b/drivers/net/ethernet/cadence/macb_main.c
> index 814a5b10141d..472bf8f220bc 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -470,6 +470,10 @@ static void macb_set_tx_clk(struct macb *bp, int speed)
> if (!bp->tx_clk || (bp->caps & MACB_CAPS_CLK_HW_CHG))
> return;
>
> + /* In case of MII the PHY is the clock master */
> + if (bp->phy_interface == PHY_INTERFACE_MODE_MII)
> + return;
> +
> switch (speed) {
> case SPEED_10:
> rate = 2500000;
> --
> 2.20.1
>
