On Tue, 12 Jan 2021 18:24:56 +0100 Yannick Vignon wrote: > From: Yannick Vignon <yannick.vig...@nxp.com> > > When configuring a 802.1Qbv schedule through the tc taprio qdisc on an NXP > i.MX8MPlus device, the effective cycle time differed from the requested one > by N*96ns, with N number of entries in the Qbv Gate Control List. This is > because the driver was adding a 96ns margin to each interval of the GCL, > apparently to account for the IPG. The problem was observed on NXP > i.MX8MPlus devices but likely affected all devices relying on the same > configuration callback (dwmac 4.00, 4.10, 5.10 variants). > > Fix the issue by removing the margins, and simply setup the MAC with the > provided cycle time value. This is the behavior expected by the user-space > API, as altering the Qbv schedule timings would break standards conformance. > This is also the behavior of several other Ethernet MAC implementations > supporting taprio, including the dwxgmac variant of stmmac. > > Signed-off-by: Yannick Vignon <yannick.vig...@nxp.com>
Thanks for the patches, could you repost and include appropriate Fixes tags? https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes > + u32 ctrl; > int i, ret = 0x0; Please keep the variable declaration lines sorted longest to shortest in both patches.
