On Tue, Jan 12, 2021 at 05:02:26PM +0100, Marek Behún wrote:
> > > +static void mv88e6393x_phylink_validate(struct mv88e6xxx_chip *chip, int
> > > port,
> > > + unsigned long *mask,
> > > + struct phylink_link_state *state)
> > > +{
> > > + if (port == 0 || port == 9 || port == 10) {
> > > + phylink_set(mask, 10000baseT_Full);
> > > + phylink_set(mask, 10000baseKR_Full);
> >
> > I think I understand the reason for declaring 10GBase-KR support in
> > phylink_validate, in case the PHY supports that link mode on the media
> > side, but...
>
> Hmm, yes, maybe KR shouldn't be here, but then why is it in
> mv88e6390x_phylink_validate?
I'm seriously thinking about changing the phylink_validate() interface
such that the question of which link _modes_ are supported no longer
comes up with MAC drivers, but instead MAC drivers say what interface
modes, speeds for each interface mode, duplexes for each speed are
supported.
There are certainly PHYs out there that take XAUI/RXAUI on the host
side and provide 10GBASE-KR on the "media" side. VSC8489 is an
example of such a PHY.
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