This patch sets the regmap stide to 4, as the chip only supports access on 32 bit alligned access.
Reviewed-by: Dan Murphy <dmur...@ti.com> Tested-by: Sean Nyekjaer <s...@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-13-...@pengutronix.de Signed-off-by: Marc Kleine-Budde <m...@pengutronix.de> --- drivers/net/can/m_can/tcan4x5x-regmap.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/can/m_can/tcan4x5x-regmap.c b/drivers/net/can/m_can/tcan4x5x-regmap.c index 73be4b661305..c6963437064c 100644 --- a/drivers/net/can/m_can/tcan4x5x-regmap.c +++ b/drivers/net/can/m_can/tcan4x5x-regmap.c @@ -55,6 +55,7 @@ static int tcan4x5x_regmap_read(void *context, static const struct regmap_config tcan4x5x_regmap = { .reg_bits = 32, + .reg_stride = 4, .val_bits = 32, .cache_type = REGCACHE_NONE, .max_register = TCAN4X5X_MAX_REGISTER, -- 2.29.2
