From: Andi Kleen <[EMAIL PROTECTED]>
Date: 09 May 2007 12:35:29 +0200

> Rick Jones <[EMAIL PROTECTED]> writes:
> 
> > Folks -
> > 
> > Is it a bug, or a feature that after changing a device's smp_affinity
> > via echo "N" >> /proc/irq/M/smp_affinity that the new mask isn't
> > visible via cat /proc/irq/M/smp_affinity until after actual interrupts
> > are taken?
> 
> Intel chipsets can only safely update affinity during interrupt processing.
> You see a side effect of the code implementing this restriction.

That's true, but we are talking about software state so in some sense
it might be better that the affinity-to-be is reported to the user in
this case.

Delayed register updates are an implementation detail the user does
not need to know about here.
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