On Fri, Dec 04, 2020 at 02:34:16PM +0200, Claudiu Beznea wrote:
> SAMA7G5's ethernet IPs TX clock could be provided by its generic clock or
> by the external clock provided by the PHY. The internal IP logic divides
> properly this clock depending on the link speed. The patch adds a new
> capability so that macb_set_tx_clock() to not be called for IPs having
> this capability (the clock rate, in case of generic clock, is set at the
> boot time via device tree and the driver only enables it).
>
> Signed-off-by: Claudiu Beznea <claudiu.bez...@microchip.com>
Reviewed-by: Andrew Lunn <and...@lunn.ch>
Andrew
