On Wed, 18 Nov 2020 20:20:56 +0200 stef...@marvell.com wrote:
> From: Stefan Chulski <stef...@marvell.com>
>
> Tx/Rx FIFO is a HW resource limited by total size, but shared
> by all ports of same CP110 and impacting port-performance.
> Do not divide the FIFO for ports which are not enabled in DTS,
> so active ports could have more FIFO.
>
> The active port mapping should be done in probe before FIFO-init.
>
> Signed-off-by: Stefan Chulski <stef...@marvell.com>
Looks good to me, but it seems you're missing more people from the CC
list.
Could you please repost and CC at least Russell?
Russell King <rmk+ker...@armlinux.org.uk>
scripts/get_maintainer.pl is your friend.
> +static void mvpp22_rx_fifo_init(struct mvpp2 *priv)
> +{
> + int port, size;
> + unsigned long port_map;
> + int remaining_ports_count;
> + int size_remainder;
> static void mvpp22_tx_fifo_init(struct mvpp2 *priv)
> {
> + int port, size;
> + unsigned long port_map;
> + int remaining_ports_count;
> + int size_remainder;
Since you're reposting please reorder the variable declaration lines
longest to shortest (reverse xmas tree).
