Thanks Jakub, Sundeep
On Sun, Nov 1, 2020 at 3:35 AM Jakub Kicinski <k...@kernel.org> wrote: > > On Thu, 29 Oct 2020 10:45:39 +0530 sundeep.l...@gmail.com wrote: > > From: Subbaraya Sundeep <sbha...@marvell.com> > > > > OcteonTx2 series of silicons have multiple variants, the > > 98xx variant has two network interface controllers (NIX blocks) > > each of which supports upto 100Gbps. Similarly 98xx supports > > two crypto blocks (CPT) to double the crypto performance. > > The current RVU drivers support a single NIX and > > CPT blocks, this patchset adds support for multiple > > blocks of same type to be active at the same time. > > > > Also the number of serdes controllers (CGX) have increased > > from three to five on 98xx. Each of the CGX block supports > > upto 4 physical interfaces depending on the serdes mode ie > > upto 20 physical interfaces. At a time each CGX block can > > be mapped to a single NIX. The HW configuration to map CGX > > and NIX blocks is done by firmware. > > > > NPC has two new interfaces added NIX1_RX and NIX1_TX > > similar to NIX0 interfaces. Also MCAM entries is increased > > from 4k to 16k. To support the 16k entries extended set > > is added in hardware which are at completely different > > register offsets. Fortunately new constant registers > > can be read to figure out the extended set is present > > or not. > > Applied, thanks!
