MT762x HW supports frame length up to 2048 (maximum length on GDM),
so allow setting MTU up to 2030.

Signed-off-by: DENG Qingfang <dqf...@gmail.com>
---

I only tested this on MT7621, no sure if it is applicable for other SoCs
especially MT7628, which has an old IP.

---
 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 31 ++++++++++++++++++++-
 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 11 ++++++--
 2 files changed, 38 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 
b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 6d2d60675ffd..a0c56d9be1d5 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -353,7 +353,7 @@ static void mtk_mac_config(struct phylink_config *config, 
unsigned int mode,
        /* Setup gmac */
        mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
        mcr_new = mcr_cur;
-       mcr_new |= MAC_MCR_MAX_RX_1536 | MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
+       mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
                   MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK;
 
        /* Only update control register when needed! */
@@ -2499,6 +2499,34 @@ static void mtk_uninit(struct net_device *dev)
        mtk_rx_irq_disable(eth, ~0);
 }
 
+static int mtk_change_mtu(struct net_device *dev, int new_mtu)
+{
+       struct mtk_mac *mac = netdev_priv(dev);
+       u32 mcr_cur, mcr_new;
+       int length;
+
+       mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
+       mcr_new = mcr_cur & ~MAC_MCR_MAX_RX_LEN_MASK;
+       length = new_mtu + MTK_RX_ETH_HLEN;
+
+       if (length <= 1518)
+               mcr_new |= MAC_MCR_MAX_RX_LEN(MAC_MCR_MAX_RX_LEN_1518);
+       else if (length <= 1536)
+               mcr_new |= MAC_MCR_MAX_RX_LEN(MAC_MCR_MAX_RX_LEN_1536);
+       else if (length <= 1552)
+               mcr_new |= MAC_MCR_MAX_RX_LEN(MAC_MCR_MAX_RX_LEN_1552);
+       else
+               mcr_new |= MAC_MCR_MAX_RX_LEN(MAC_MCR_MAX_RX_LEN_2048);
+
+       /* Only update control register when needed! */
+       if (mcr_new != mcr_cur)
+               mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id));
+
+       dev->mtu = new_mtu;
+
+       return 0;
+}
+
 static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 {
        struct mtk_mac *mac = netdev_priv(dev);
@@ -2795,6 +2823,7 @@ static const struct net_device_ops mtk_netdev_ops = {
        .ndo_set_mac_address    = mtk_set_mac_address,
        .ndo_validate_addr      = eth_validate_addr,
        .ndo_do_ioctl           = mtk_do_ioctl,
+       .ndo_change_mtu         = mtk_change_mtu,
        .ndo_tx_timeout         = mtk_tx_timeout,
        .ndo_get_stats64        = mtk_get_stats64,
        .ndo_fix_features       = mtk_fix_features,
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 
b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 454cfcd465fd..cfc11654ccd6 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -17,12 +17,12 @@
 #include <linux/phylink.h>
 
 #define MTK_QDMA_PAGE_SIZE     2048
-#define        MTK_MAX_RX_LENGTH       1536
+#define MTK_MAX_RX_LENGTH      2048
 #define MTK_TX_DMA_BUF_LEN     0x3fff
 #define MTK_DMA_SIZE           256
 #define MTK_NAPI_WEIGHT                64
 #define MTK_MAC_COUNT          2
-#define MTK_RX_ETH_HLEN                (VLAN_ETH_HLEN + VLAN_HLEN + 
ETH_FCS_LEN)
+#define MTK_RX_ETH_HLEN                (ETH_HLEN + ETH_FCS_LEN)
 #define MTK_RX_HLEN            (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
 #define MTK_DMA_DUMMY_DESC     0xffffffff
 #define MTK_DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | \
@@ -320,7 +320,12 @@
 
 /* Mac control registers */
 #define MTK_MAC_MCR(x)         (0x10100 + (x * 0x100))
-#define MAC_MCR_MAX_RX_1536    BIT(24)
+#define MAC_MCR_MAX_RX_LEN_MASK        GENMASK(25, 24)
+#define MAC_MCR_MAX_RX_LEN(_x) (MAC_MCR_MAX_RX_LEN_MASK & ((_x) << 24))
+#define MAC_MCR_MAX_RX_LEN_1518        0x0
+#define MAC_MCR_MAX_RX_LEN_1536        0x1
+#define MAC_MCR_MAX_RX_LEN_1552        0x2
+#define MAC_MCR_MAX_RX_LEN_2048        0x3
 #define MAC_MCR_IPG_CFG                (BIT(18) | BIT(16))
 #define MAC_MCR_FORCE_MODE     BIT(15)
 #define MAC_MCR_TX_EN          BIT(14)
-- 
2.25.1

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