From: Subbaraya Sundeep <sbha...@marvell.com>

Initialize MCE context for the assigned NIX0/1
block for a CGX mapped PF. Modified rvu_nix_aq_enq_inst
function to work with nix_hw so that MCE contexts
for both NIX blocks can be inited.

Signed-off-by: Subbaraya Sundeep <sbha...@marvell.com>
Signed-off-by: Sunil Goutham <sgout...@marvell.com>
Signed-off-by: Rakesh Babu <rsala...@marvell.com>
---
 .../net/ethernet/marvell/octeontx2/af/rvu_nix.c    | 56 ++++++++++++++--------
 1 file changed, 36 insertions(+), 20 deletions(-)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c 
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 6b8c964..9b60172 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -649,8 +649,9 @@ static int nix_aq_enqueue_wait(struct rvu *rvu, struct 
rvu_block *block,
        return 0;
 }
 
-static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,
-                              struct nix_aq_enq_rsp *rsp)
+static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu, struct nix_hw *nix_hw,
+                                  struct nix_aq_enq_req *req,
+                                  struct nix_aq_enq_rsp *rsp)
 {
        struct rvu_hwinfo *hw = rvu->hw;
        u16 pcifunc = req->hdr.pcifunc;
@@ -659,15 +660,11 @@ static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct 
nix_aq_enq_req *req,
        struct rvu_block *block;
        struct admin_queue *aq;
        struct rvu_pfvf *pfvf;
-       struct nix_hw *nix_hw;
        void *ctx, *mask;
        bool ena;
        u64 cfg;
 
-       blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
-       if (blkaddr < 0)
-               return NIX_AF_ERR_AF_LF_INVALID;
-
+       blkaddr = nix_hw->blkaddr;
        block = &hw->block[blkaddr];
        aq = block->aq;
        if (!aq) {
@@ -675,10 +672,6 @@ static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct 
nix_aq_enq_req *req,
                return NIX_AF_ERR_AQ_ENQUEUE;
        }
 
-       nix_hw =  get_nix_hw(rvu->hw, blkaddr);
-       if (!nix_hw)
-               return -EINVAL;
-
        pfvf = rvu_get_pfvf(rvu, pcifunc);
        nixlf = rvu_get_lf(rvu, block, pcifunc, 0);
 
@@ -875,6 +868,23 @@ static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct 
nix_aq_enq_req *req,
        return 0;
 }
 
+static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,
+                              struct nix_aq_enq_rsp *rsp)
+{
+       struct nix_hw *nix_hw;
+       int blkaddr;
+
+       blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, req->hdr.pcifunc);
+       if (blkaddr < 0)
+               return NIX_AF_ERR_AF_LF_INVALID;
+
+       nix_hw =  get_nix_hw(rvu->hw, blkaddr);
+       if (!nix_hw)
+               return -EINVAL;
+
+       return rvu_nix_blk_aq_enq_inst(rvu, nix_hw, req, rsp);
+}
+
 static const char *nix_get_ctx_name(int ctype)
 {
        switch (ctype) {
@@ -1993,8 +2003,8 @@ int rvu_mbox_handler_nix_vtag_cfg(struct rvu *rvu,
        return 0;
 }
 
-static int nix_setup_mce(struct rvu *rvu, int mce, u8 op,
-                        u16 pcifunc, int next, bool eol)
+static int nix_blk_setup_mce(struct rvu *rvu, struct nix_hw *nix_hw,
+                            int mce, u8 op, u16 pcifunc, int next, bool eol)
 {
        struct nix_aq_enq_req aq_req;
        int err;
@@ -2014,7 +2024,7 @@ static int nix_setup_mce(struct rvu *rvu, int mce, u8 op,
        /* All fields valid */
        *(u64 *)(&aq_req.mce_mask) = ~0ULL;
 
-       err = rvu_nix_aq_enq_inst(rvu, &aq_req, NULL);
+       err = rvu_nix_blk_aq_enq_inst(rvu, nix_hw, &aq_req, NULL);
        if (err) {
                dev_err(rvu->dev, "Failed to setup Bcast MCE for PF%d:VF%d\n",
                        rvu_get_pf(pcifunc), pcifunc & RVU_PFVF_FUNC_MASK);
@@ -2120,9 +2130,9 @@ int nix_update_bcast_mce_list(struct rvu *rvu, u16 
pcifunc, bool add)
 
                next_idx = idx + 1;
                /* EOL should be set in last MCE */
-               err = nix_setup_mce(rvu, idx, NIX_AQ_INSTOP_WRITE,
-                                   mce->pcifunc, next_idx,
-                                   (next_idx > last_idx) ? true : false);
+               err = nix_blk_setup_mce(rvu, nix_hw, idx, NIX_AQ_INSTOP_WRITE,
+                                       mce->pcifunc, next_idx,
+                                       (next_idx > last_idx) ? true : false);
                if (err)
                        goto end;
                idx++;
@@ -2151,6 +2161,11 @@ static int nix_setup_bcast_tables(struct rvu *rvu, 
struct nix_hw *nix_hw)
                numvfs = (cfg >> 12) & 0xFF;
 
                pfvf = &rvu->pf[pf];
+
+               /* This NIX0/1 block mapped to PF ? */
+               if (pfvf->nix_blkaddr != nix_hw->blkaddr)
+                       continue;
+
                /* Save the start MCE */
                pfvf->bcast_mce_idx = nix_alloc_mce_list(mcast, numvfs + 1);
 
@@ -2165,9 +2180,10 @@ static int nix_setup_bcast_tables(struct rvu *rvu, 
struct nix_hw *nix_hw)
                         * Will be updated when a NIXLF is attached/detached to
                         * these PF/VFs.
                         */
-                       err = nix_setup_mce(rvu, pfvf->bcast_mce_idx + idx,
-                                           NIX_AQ_INSTOP_INIT,
-                                           pcifunc, 0, true);
+                       err = nix_blk_setup_mce(rvu, nix_hw,
+                                               pfvf->bcast_mce_idx + idx,
+                                               NIX_AQ_INSTOP_INIT,
+                                               pcifunc, 0, true);
                        if (err)
                                return err;
                }
-- 
2.7.4

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