[PATCH net] r8169: fix RTL8168f/RTL8411 EPHY config

[Heiner Kallweit]

Mistakenly bit 2 was set instead of bit 3 as in the vendor driver.

Fixes: a7a92cf81589 ("r8169: sync PCIe PHY init with vendor driver 8.047.01")
Signed-off-by: Heiner Kallweit <hkallwe...@gmail.com>
---
 drivers/net/ethernet/realtek/r8169_main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/realtek/r8169_main.c 
b/drivers/net/ethernet/realtek/r8169_main.c
index 9e4e6a883..6c7c004c2 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2901,7 +2901,7 @@ static void rtl_hw_start_8168f_1(struct rtl8169_private 
*tp)
                { 0x08, 0x0001, 0x0002 },
                { 0x09, 0x0000, 0x0080 },
                { 0x19, 0x0000, 0x0224 },
-               { 0x00, 0x0000, 0x0004 },
+               { 0x00, 0x0000, 0x0008 },
                { 0x0c, 0x3df0, 0x0200 },
        };
 
@@ -2918,7 +2918,7 @@ static void rtl_hw_start_8411(struct rtl8169_private *tp)
                { 0x06, 0x00c0, 0x0020 },
                { 0x0f, 0xffff, 0x5200 },
                { 0x19, 0x0000, 0x0224 },
-               { 0x00, 0x0000, 0x0004 },
+               { 0x00, 0x0000, 0x0008 },
                { 0x0c, 0x3df0, 0x0200 },
        };
 
-- 
2.28.0