On Wed, 2020-08-26 at 07:55 -0700, Eric Dumazet wrote: > > On 8/26/20 5:54 AM, Tariq Toukan wrote: > > A single cacheline might not contain the packet header for > > small L1_CACHE_BYTES values. > > Use net_prefetch() as it issues an additional prefetch > > in this case. > > > > Signed-off-by: Tariq Toukan <tar...@mellanox.com> > > Reviewed-by: Saeed Mahameed <sae...@mellanox.com> > > --- > > drivers/net/ethernet/mellanox/mlx4/en_rx.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c > > b/drivers/net/ethernet/mellanox/mlx4/en_rx.c > > index b50c567ef508..99d7737e8ad6 100644 > > --- a/drivers/net/ethernet/mellanox/mlx4/en_rx.c > > +++ b/drivers/net/ethernet/mellanox/mlx4/en_rx.c > > @@ -705,7 +705,7 @@ int mlx4_en_process_rx_cq(struct net_device > > *dev, struct mlx4_en_cq *cq, int bud > > > > frags = ring->rx_info + (index << priv->log_rx_info); > > va = page_address(frags[0].page) + > > frags[0].page_offset; > > - prefetchw(va); > > + net_prefetchw(va); > > /* > > * make sure we read the CQE after we read the > > ownership bit > > */ > > > > Why these cache lines would be written next ? Presumably we read the > headers (pulled into skb->head) >
XDP > Really using prefetch() for the about to be read packet is too late > anyway for current cpus. >
