On 8/2/2020 10:44 PM, Michael Grzeschik wrote:
> From: Andrew Lunn <and...@lunn.ch>
>
> SMI0 is a mangled version of MDIO. The main low level difference is
> the MDIO C22 OP code is always 0, not 0x2 or 0x1 for Read/Write. The
> read/write information is instead encoded in the PHY address.
>
> Extend the bit-bang code to allow the op code to be overridden, but
> default to normal C22 values. Add an extra compatible to the mdio-gpio
> driver, and when this compatible is present, set the op codes to 0.
>
> A higher level driver, sitting on top of the basic MDIO bus driver can
> then implement the rest of the microchip SMI0 odderties.
>
> Signed-off-by: Andrew Lunn <and...@lunn.ch>
> Signed-off-by: Michael Grzeschik <m.grzesc...@pengutronix.de>
>
> ---
[snip]
> diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
> index 1b00235d7dc5b56..e8d83cee1bc17e1 100644
> --- a/drivers/net/phy/mdio-gpio.c
> +++ b/drivers/net/phy/mdio-gpio.c
> @@ -132,6 +132,14 @@ static struct mii_bus *mdio_gpio_bus_init(struct device
> *dev,
> new_bus->phy_ignore_ta_mask = pdata->phy_ignore_ta_mask;
> }
>
> + if (dev->of_node &&
> + of_device_is_compatible(dev->of_node, "microchip,mdio-smi0")) {
> + bitbang->ctrl.op_c22_read = 0;
> + bitbang->ctrl.op_c22_write = 0;
> + } else {
> + bitbang->ctrl.override_op_c22 = 1;
Do not you have the logic reversed here? You meant to set
ctrl.override_op_c22 to 1 *if* your compatibility string is
microchip,mdio-smi0 to indicate the use of non-standard clause 22 read
and write opcodes?
--
Florian
