As of the patch ("ath10k: Keep track of which interrupts fired, don't
poll them") we now have no users of this hardware parameter.  Remove
it.

Suggested-by: Brian Norris <[email protected]>
Signed-off-by: Douglas Anderson <[email protected]>
---

Changes in v2:
- Patch ("ath10k: Get rid of "per_ce_irq" hw param") new for v2.

 drivers/net/wireless/ath/ath10k/core.c | 13 -------------
 drivers/net/wireless/ath/ath10k/hw.h   |  3 ---
 2 files changed, 16 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/core.c 
b/drivers/net/wireless/ath/ath10k/core.c
index 22b6937ac225..9104496a5125 100644
--- a/drivers/net/wireless/ath/ath10k/core.c
+++ b/drivers/net/wireless/ath/ath10k/core.c
@@ -119,7 +119,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -155,7 +154,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -220,7 +218,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -255,7 +252,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -290,7 +286,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -328,7 +323,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -369,7 +363,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -417,7 +410,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -462,7 +454,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -497,7 +488,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -534,7 +524,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -603,7 +592,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -631,7 +619,6 @@ static const struct ath10k_hw_params 
ath10k_hw_params_list[] = {
                .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
                .target_64bit = true,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
-               .per_ce_irq = true,
                .shadow_reg_support = true,
                .rri_on_ddr = true,
                .hw_filter_reset_required = false,
diff --git a/drivers/net/wireless/ath/ath10k/hw.h 
b/drivers/net/wireless/ath/ath10k/hw.h
index f16edcb9f326..c6ded21f5ed6 100644
--- a/drivers/net/wireless/ath/ath10k/hw.h
+++ b/drivers/net/wireless/ath/ath10k/hw.h
@@ -593,9 +593,6 @@ struct ath10k_hw_params {
        /* Target rx ring fill level */
        u32 rx_ring_fill_level;
 
-       /* target supporting per ce IRQ */
-       bool per_ce_irq;
-
        /* target supporting shadow register for ce write */
        bool shadow_reg_support;
 
-- 
2.27.0.383.g050319c2ae-goog

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