> -----Original Message-----
> From: Joe Perches <j...@perches.com>
> Sent: Thursday, June 25, 2020 8:12 PM
> To: Kirsher, Jeffrey T <jeffrey.t.kirs...@intel.com>; da...@davemloft.net
> Cc: Michael, Alice <alice.mich...@intel.com>; netdev@vger.kernel.org;
> nhor...@redhat.com; sassm...@redhat.com; Brady, Alan
> <alan.br...@intel.com>; Burra, Phani R <phani.r.bu...@intel.com>; Hay,
> Joshua A <joshua.a....@intel.com>; Chittim, Madhu
> <madhu.chit...@intel.com>; Linga, Pavan Kumar
> <pavan.kumar.li...@intel.com>; Skidmore, Donald C
> <donald.c.skidm...@intel.com>; Brandeburg, Jesse
> <jesse.brandeb...@intel.com>; Samudrala, Sridhar
> <sridhar.samudr...@intel.com>
> Subject: Re: [net-next v3 12/15] iecm: Add singleq TX/RX
>
> On Thu, 2020-06-25 at 19:07 -0700, Jeff Kirsher wrote:
> > From: Alice Michael <alice.mich...@intel.com>
> >
> > Implement legacy single queue model for TX/RX flows.
> []
> > diff --git a/drivers/net/ethernet/intel/iecm/iecm_singleq_txrx.c
> > b/drivers/net/ethernet/intel/iecm/iecm_singleq_txrx.c
> []
> > @@ -145,7 +508,63 @@ static void iecm_rx_singleq_csum(struct iecm_queue
> *rxq, struct sk_buff *skb,
> > struct iecm_singleq_base_rx_desc *rx_desc,
> > u8 ptype)
> > {
> []
> > + if (ipv4 && (rx_error & (BIT(IECM_RX_BASE_DESC_ERROR_IPE_S) |
> > + BIT(IECM_RX_BASE_DESC_ERROR_EIPE_S))))
> > + goto checksum_fail;
> > + else if (ipv6 && (rx_status &
> > + (BIT(IECM_RX_BASE_DESC_STATUS_IPV6EXADD_S))))
> > + goto checksum_fail;
> > +
> > + /* check for L4 errors and handle packets that were not able to be
> > + * checksummed due to arrival speed
> > + */
> > + if (rx_error & BIT(IECM_RX_BASE_DESC_ERROR_L3L4E_S))
> > + goto checksum_fail;
> []
> > +checksum_fail:
> > + dev_dbg(rxq->dev, "RX Checksum not available\n");
>
> If there's an actual checksum arrival speed issue, then likely this dbg output
> should be ratelimited too.
>
Yeah this is an issue. I think we want to add a counter here instead of
printing anything out anyway. Will fix.
Alan
