Set the correct bit when checking for PHY_BRCM_DIS_TXCRXC_NOENRGY on the 
BCM54810 PHY.

Signed-off-by: Kevin Lo <ke...@kevlo.org>
---
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index 97201d5cf007..45d0aefb964c 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -225,8 +225,12 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device 
*phydev)
        else
                val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
 
-       if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY)
-               val |= BCM54XX_SHD_SCR3_TRDDAPD;
+       if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) {
+               if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810)
+                       val |= BCM54810_SHD_SCR3_TRDDAPD;
+               else
+                       val |= BCM54XX_SHD_SCR3_TRDDAPD;
+       }
 
        if (orig != val)
                bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val);
diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h
index d41624db6de2..1d339a862f7b 100644
--- a/include/linux/brcmphy.h
+++ b/include/linux/brcmphy.h
@@ -255,6 +255,7 @@
 #define BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN        (1 << 0)
 #define BCM54810_SHD_CLK_CTL                   0x3
 #define BCM54810_SHD_CLK_CTL_GTXCLK_EN         (1 << 9)
+#define BCM54810_SHD_SCR3_TRDDAPD              0x0100
 
 /* BCM54612E Registers */
 #define BCM54612E_EXP_SPARE0           (MII_BCM54XX_EXP_SEL_ETC + 0x34)

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