Description: this patch adds a reset of the PHY in phy_init_hw()
for PHY drivers bearing the PHY_RST_AFTER_CLK_EN flag.
Rationale: due to the PHY reset reverting the interrupt mask to default,
it is necessary to either perform the reset before PHY configuration,
or re-configure the PHY after reset. This patch implements the former
as it is simpler and more generic.
Fixes: 1b0a83ac04e3 ("net: fec: add phy_reset_after_clk_enable() support")
Signed-off-by: Laurent Badel <laurentba...@eaton.com>
---
drivers/net/phy/phy_device.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 28e3c5c0e..2cc511364 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1082,8 +1082,11 @@ int phy_init_hw(struct phy_device *phydev)
{
int ret = 0;
- /* Deassert the reset signal */
- phy_device_reset(phydev, 0);
+ /* Deassert the reset signal
+ * If the PHY needs a reset, do it now
+ */
+ if (!phy_reset_after_clk_enable(phydev))
+ phy_device_reset(phydev, 0);
if (!phydev->drv)
return 0;
--
2.17.1
>
-----------------------------
Eaton Industries Manufacturing GmbH ~ Registered place of business: Route de la
Longeraie 7, 1110, Morges, Switzerland
-----------------------------
-----Original Message-----
> From: Badel, Laurent
> Sent: Wednesday, April 29, 2020 11:04 AM
> To: 'fugang.d...@nxp.com' <fugang.d...@nxp.com>;
> 'netdev@vger.kernel.org' <netdev@vger.kernel.org>; 'and...@lunn.ch'
> <and...@lunn.ch>; 'f.faine...@gmail.com' <f.faine...@gmail.com>;
> 'hkallwe...@gmail.com' <hkallwe...@gmail.com>; 'li...@armlinux.org.uk'
> <li...@armlinux.org.uk>; 'richard.leit...@skidata.com'
> <richard.leit...@skidata.com>; 'da...@davemloft.net'
> <da...@davemloft.net>; 'alexander.le...@microsoft.com'
> <alexander.le...@microsoft.com>; 'gre...@linuxfoundation.org'
> <gre...@linuxfoundation.org>
> Cc: Quette, Arnaud <arnaudque...@eaton.com>
> Subject: [PATCH 2/2] Reset PHY in phy_init_hw() before interrupt
> configuration
>
> Description: this patch adds a reset of the PHY in phy_init_hw() for PHY
> drivers bearing the PHY_RST_AFTER_CLK_EN flag.
>
> Rationale: due to the PHY reset reverting the interrupt mask to default, it is
> necessary to either perform the reset before PHY configuration, or re-
> configure the PHY after reset. This patch implements the former as it is
> simpler and more generic.
>
> Fixes: 1b0a83ac04e383e3bed21332962b90710fcf2828 ("net: fec: add
> phy_reset_after_clk_enable() support")
> Signed-off-by: Laurent Badel <laurentba...@eaton.com>
>
> ---
> drivers/net/phy/phy_device.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
> index 28e3c5c0e..2cc511364 100644
> --- a/drivers/net/phy/phy_device.c
> +++ b/drivers/net/phy/phy_device.c
> @@ -1082,8 +1082,11 @@ int phy_init_hw(struct phy_device *phydev) {
> int ret = 0;
>
> - /* Deassert the reset signal */
> - phy_device_reset(phydev, 0);
> + /* Deassert the reset signal
> + * If the PHY needs a reset, do it now
> + */
> + if (!phy_reset_after_clk_enable(phydev))
> + phy_device_reset(phydev, 0);
>
> if (!phydev->drv)
> return 0;
> --
> 2.17.1
