Hello Andrew, I see dead people... Really i do! After your reply.
> This happens when the driver is missing a resource during probe. It > returns the error -EPROBE_DEFER, and the linux driver core will try > the probe again later. Probably the second time all the resources it > needs will be present and the probe will be successful. Thank you for the explanation. It helps to understand better the logs. > I will probably have a some patches during the next kernel merge cycle > to make this a bit more efficient. I am very interested on these patches. Please, keep me in the loop! Please. > No, it is not an obstacle, but it is still wrong. It is. Agree. This (DTS for the custom board) I'll fix Monday. It is Sunday... > ip link set eth0 up > ip link set lan0 up > ip link set lan1 up > ip link name br0 type bridge > ip link set br0 up > ip link lan0 master br0 > ip link lan1 master br0 Crucifix! I totally forgot to configure interfaces!!! This is why I do NOT see pings, since rgmii management port 0 does NOT have phy attached!!! The whole thing MUST be configured as link layer (bridge), to work properly on MAC/PHY layers. About STP (routing), this is not mandatory now. I am dumb old dog... Sorry, even dumber! I admit... Happens! :-( I wrote my (very first) public GIST about that. Please, could you review it, and point to the any logical bugs in there? https://gist.github.com/ZoranStojsavljevic/423b96e2ca3bd581f7ce417cb410c465 Thank you many many times, Zoran _______ On Sat, Sep 28, 2019 at 5:21 PM Andrew Lunn <and...@lunn.ch> wrote: > > On Sat, Sep 28, 2019 at 01:00:43AM +0200, Zoran Stojsavljevic wrote: > > Hello Andrew, > > > > > You should not need any kernel patches for switch side RGMII > > > delays. rgmii-id in the DT for the switch CPU port should be enough. > > > Some of the vf610-zii platforms use it. > > > > It should, but it does NOT work. IT is clearly stated in port.c, in f-n: > > static int mv88e6xxx_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int > > port, > > phy_interface_t mode) > > > > The logic analyser shows MDIO write to register 0x01, which is 0x6003. > > Seems the correct value. > > > > But, at the very end, ethtool shows that this clock skew is NOT > > inserted. > > How do you see this with ethtool? > > > I see on RX side CRC errors. Every ethernet frame while > > pinging. > > But TX works? Maybe the FEC is doing some sort of delay, even if it > has a hardware bug. > > > I see another interesting fact, the dmesg, which you could see here: > > https://pastebin.com/igXS6eXe > > > > [ 1.182273] DEBUG INFO! <- addr: 0x00 reg: 0x03 val: 0x1901 > > [ 1.187888] mv88e6085 2188000.ethernet-1:00: switch 0x1900 > > detected: Marvell 88E6190, revision 1 > > [ 1.219804] random: fast init done > > [ 1.225334] libphy: mv88e6xxx SMI: probed > > [ 1.232709] fec 2188000.ethernet eth0: registered PHC device 0 > > > > [ 1.547946] DEBUG INFO! <- addr: 0x00 reg: 0x03 val: 0x1901 > > [ 1.553542] mv88e6085 2188000.ethernet-1:00: switch 0x1900 > > detected: Marvell 88E6190, revision 1 > > [ 1.555432] mmcblk1: p1 > > [ 1.598106] libphy: mv88e6xxx SMI: probed > > [ 1.740362] DSA: tree 0 setup > > > > There are two distinct accesses while driver configures the switch. Why??? > > This happens when the driver is missing a resource during probe. It > returns the error -EPROBE_DEFER, and the linux driver core will try > the probe again later. Probably the second time all the resources it > needs will be present and the probe will be successful. > > I will probably have a some patches during the next kernel merge cycle > to make this a bit more efficient. > > > I was not able to explain this to me... Or find explanation using google?! > > > > > gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; is wrong. It probably > > > should be reset-gpios. The rest looks O.K. > > > > I will follow the advise, but I do not think this is an obstacle. > > No, it is not an obstacle, but it is still wrong. > > > > > > Please show me the configuration steps you are doing? How are you > > > configuring the FEC and the switch interfaces? > > > > Forgive me for my ignorance, but I have no idea what you have asked me for? > > ip link set eth0 up > ip link set lan0 up > ip link set lan1 up > ip link name br0 type bridge > ip link set br0 up > ip link lan0 master br0 > ip link lan1 master br0 > > Andrew
