From: Thierry Reding <thierry.red...@gmail.com> Date: Sep/09/2019, 16:25:46 (UTC+00:00)
> @@ -79,6 +79,10 @@ static void dwmac4_dma_init_rx_chan(void __iomem *ioaddr, > value = value | (rxpbl << DMA_BUS_MODE_RPBL_SHIFT); > writel(value, ioaddr + DMA_CHAN_RX_CONTROL(chan)); > > + if (dma_cfg->eame) There is no need for this check. If EAME is not enabled then upper 32 bits will be zero. > + writel(upper_32_bits(dma_rx_phy), > + ioaddr + DMA_CHAN_RX_BASE_ADDR_HI(chan)); > + > writel(lower_32_bits(dma_rx_phy), ioaddr + DMA_CHAN_RX_BASE_ADDR(chan)); > } > @@ -97,6 +101,10 @@ static void dwmac4_dma_init_tx_chan(void __iomem *ioaddr, > > writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan)); > > + if (dma_cfg->eame) Same here. > + writel(upper_32_bits(dma_tx_phy), > + ioaddr + DMA_CHAN_TX_BASE_ADDR_HI(chan)); > + > writel(lower_32_bits(dma_tx_phy), ioaddr + DMA_CHAN_TX_BASE_ADDR(chan)); > } Also, please provide a cover letter in next submission. --- Thanks, Jose Miguel Abreu
