On Tue, 13 Aug 2019 17:44:16 +0200 Marek Behún <marek.be...@nic.cz> wrote:
> Hi Andrew, > > > We should read the switch registers. I think you can set the > > defaults using strapping pins. And in general, the driver always > > reads state from the hardware rather than caching it. > > hmm. The cmode is cached for each port, though. For example > mv88e6390x_port_set_cmode compares the new requested value with the > cached one and doesn't do anything if they are equal. > > If mv88e6xxx_port_setup_mac can be called once per second by phylink > as you say, do we really want to read the value via MDIO every time? > We already have cmode cached (read from registers at mv88e6xxx_setup, > and then changed when cmode change is requested). From cmode we can > already differentiate mode in the terms of phy_interface_t, unless it > is RGMII, in which case we would have to read RX/TX timing. > > Marek /o\ OK. I see now that mv88e6xxx_port_setup_mac already calls ->port_link_state(), which fills in a struct phylink_link_state, and already does MDIO communication. Sorry :) I will try to send a patch which adds the filling of the ->interface member of the struct phylink_link_state in ->port_link_state() method. Marek
