From: yuqi jin <jiny...@huawei.com> XGMAC_MTL_RXQ_DMA_MAP1 will be configured if the number of queues is greater than 3, but local variable chan will shift left more than 32-bits. Let's fix this issue.
Cc: Giuseppe Cavallaro <peppe.cavall...@st.com> Cc: Alexandre Torgue <alexandre.tor...@st.com> Cc: Jose Abreu <joab...@synopsys.com> Cc: "David S. Miller" <da...@davemloft.net> Cc: Maxime Coquelin <mcoquelin.st...@gmail.com> Signed-off-by: Yuqi Jin <jiny...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index 0a32c96a7854..de4b15f31727 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -166,13 +166,14 @@ static void dwxgmac2_map_mtl_to_dma(struct mac_device_info *hw, u32 queue, u32 chan) { void __iomem *ioaddr = hw->pcsr; - u32 value, reg; + u32 value, reg, index; reg = (queue < 4) ? XGMAC_MTL_RXQ_DMA_MAP0 : XGMAC_MTL_RXQ_DMA_MAP1; + index = (queue < 4) ? queue : queue - 4; value = readl(ioaddr + reg); - value &= ~XGMAC_QxMDMACH(queue); - value |= (chan << XGMAC_QxMDMACH_SHIFT(queue)) & XGMAC_QxMDMACH(queue); + value &= ~XGMAC_QxMDMACH(index); + value |= (chan << XGMAC_QxMDMACH_SHIFT(index)) & XGMAC_QxMDMACH(index); writel(value, ioaddr + reg); } -- 2.7.4