[PATCH/RFC bpf-next 08/16] arm: bpf: eliminate zero extension code-gen

[Jiong Wang]

Cc: Shubham Bansal <illusionist....@gmail.com>
Signed-off-by: Jiong Wang <jiong.w...@netronome.com>
---
 arch/arm/net/bpf_jit_32.c | 22 ++++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
index c8bfbbf..8cecd06 100644
--- a/arch/arm/net/bpf_jit_32.c
+++ b/arch/arm/net/bpf_jit_32.c
@@ -736,7 +736,8 @@ static inline void emit_a32_alu_r64(const bool is64, const 
s8 dst[],
 
                /* ALU operation */
                emit_alu_r(rd[1], rs, true, false, op, ctx);
-               emit_a32_mov_i(rd[0], 0, ctx);
+               if (ctx->prog->aux->no_verifier_zext)
+                       emit_a32_mov_i(rd[0], 0, ctx);
        }
 
        arm_bpf_put_reg64(dst, rd, ctx);
@@ -758,8 +759,9 @@ static inline void emit_a32_mov_r64(const bool is64, const 
s8 dst[],
                                  struct jit_ctx *ctx) {
        if (!is64) {
                emit_a32_mov_r(dst_lo, src_lo, ctx);
-               /* Zero out high 4 bytes */
-               emit_a32_mov_i(dst_hi, 0, ctx);
+               if (ctx->prog->aux->no_verifier_zext)
+                       /* Zero out high 4 bytes */
+                       emit_a32_mov_i(dst_hi, 0, ctx);
        } else if (__LINUX_ARM_ARCH__ < 6 &&
                   ctx->cpu_architecture < CPU_ARCH_ARMv5TE) {
                /* complete 8 byte move */
@@ -1438,7 +1440,8 @@ static int build_insn(const struct bpf_insn *insn, struct 
jit_ctx *ctx)
                }
                emit_udivmod(rd_lo, rd_lo, rt, ctx, BPF_OP(code));
                arm_bpf_put_reg32(dst_lo, rd_lo, ctx);
-               emit_a32_mov_i(dst_hi, 0, ctx);
+               if (ctx->prog->aux->no_verifier_zext)
+                       emit_a32_mov_i(dst_hi, 0, ctx);
                break;
        case BPF_ALU64 | BPF_DIV | BPF_K:
        case BPF_ALU64 | BPF_DIV | BPF_X:
@@ -1453,7 +1456,8 @@ static int build_insn(const struct bpf_insn *insn, struct 
jit_ctx *ctx)
                        return -EINVAL;
                if (imm)
                        emit_a32_alu_i(dst_lo, imm, ctx, BPF_OP(code));
-               emit_a32_mov_i(dst_hi, 0, ctx);
+               if (ctx->prog->aux->no_verifier_zext)
+                       emit_a32_mov_i(dst_hi, 0, ctx);
                break;
        /* dst = dst << imm */
        case BPF_ALU64 | BPF_LSH | BPF_K:
@@ -1488,7 +1492,8 @@ static int build_insn(const struct bpf_insn *insn, struct 
jit_ctx *ctx)
        /* dst = ~dst */
        case BPF_ALU | BPF_NEG:
                emit_a32_alu_i(dst_lo, 0, ctx, BPF_OP(code));
-               emit_a32_mov_i(dst_hi, 0, ctx);
+               if (ctx->prog->aux->no_verifier_zext)
+                       emit_a32_mov_i(dst_hi, 0, ctx);
                break;
        /* dst = ~dst (64 bit) */
        case BPF_ALU64 | BPF_NEG:
@@ -1838,6 +1843,11 @@ void bpf_jit_compile(struct bpf_prog *prog)
        /* Nothing to do here. We support Internal BPF. */
 }
 
+bool bpf_jit_hardware_zext(void)
+{
+       return false;
+}
+
 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
 {
        struct bpf_prog *tmp, *orig_prog = prog;
-- 
2.7.4