From: Heiner Kallweit <hkallwe...@gmail.com> Date: Fri, 22 Mar 2019 20:00:20 +0100
> So far we effectively clear the BMCR register. Some PHY's can deal > with this (e.g. because they reset BMCR to a default as part of a > soft-reset) whilst on others this causes issues because e.g. the > autoneg bit is cleared. Marvell is an example, see also thread [0]. > So let's be a little bit more gentle and leave all bits we're not > interested in as-is. This change is needed for PHY drivers to > properly deal with the original patch. > > [0] https://marc.info/?t=155264050700001&r=1&w=2 > > Fixes: 6e2d85ec0559 ("net: phy: Stop with excessive soft reset") > Tested-by: Phil Reid <pr...@electromag.com.au> > Tested-by: liweihang <liweih...@hisilicon.com> > Signed-off-by: Heiner Kallweit <hkallwe...@gmail.com> Applied and queued up for -stable, thanks.
