On Mon, Mar 04, 2019 at 12:59:42PM +0000, Rasmus Villemoes wrote:
> From: Per Noergaard Christensen <p...@deif.com>
>
> The 88e6250 does not support multi-chip addressing. However, one can
> still have two of them on the same mdio bus, since the device only
> uses 16 of the 32 possible addresses, either addresses 0x00-0x0F or
> 0x10-0x1F depending on the ADDR4 pin at reset [since ADDR4 is
> internally pulled high, the latter is the default].
>
> In order to prepare for supporting the 88e6250, change
> mv88e6xxx_smi_init and the single_chip_{read,write} functions to allow
> and honour a non-zero sw_addr in single chip mode. Since this only
> changes the behaviour in the sw_addr!=0 && !chip->info->multi_chip
> case from returning -EINVAL, it should not break existing setups.
Hi Rasmus
We have the nice abstraction of mv88e6xxx_smi_multi_chip_ops and
mv88e6xxx_smi_single_chip_ops. I think we should extend this
abstraction and implement mv88e6xxx_smi_dual_chip_ops. Also, add a
chip->info->dual_chip flag, so we know when it can be used.
Andrew
