On 07.02.2019 20:57, Andrew Lunn wrote: > On Thu, Feb 07, 2019 at 08:05:55PM +0100, Heiner Kallweit wrote: >> Let genphy_c45_read_link manage the devices to check, this removes >> overhead from callers. Devices VEND1 and VEND2 will never be checked, >> for now adopt the logic of the Marvell driver to also exclude PHY XS. >> >> At the moment we have very few clause 45 PHY drivers, so we are >> lacking experience whether other drivers will have to exclude further >> devices, or may need to check PHY XS. If we should figure out that >> list of devices to check needs to be configurable, I think best will >> be to add a device list member to struct phy_driver. > > Hi Heiner > > For the Aquantia PHY you probably need to exclude MDIO_MMD_C22EXT. > > There is no register 1D:1 listed in the datasheet. > Thanks, Andrew. Right, the Aquantia PHY doesn't seem to have the C22EXT MMD. Because the Aquantia PHY has no device 29 in its package the code should work. I also checked the 802.3 spec and it says that registers 29.0 to 29.4 are reserved. At another location the 802.3 spec states that read access to non-existing registers should return a zero value. Therefore current code (when reading a 0 from 29.1) may come to the false conclusion that device 29 reports link down. So it seems we have to exclude device C22EXT in general. I'll add that and submit a v2.
> PHY XS is the interface towards the MAC. You cannot configure the MAC > to use the correct interface mode until the PHY has link to its peer > and the link mode has been determined. So you need the PHY to signal > link up independent of the MAC-PHY link, to kick off the configuration > of the MAC. When using phylink, the MAC can indicate it has a link to > the PHY using phylink_mac_change(). > OK, so excluding PHY XS is right. > Andrew > > Heiner
