On Fri, Jan 18, 2019 at 04:23:46PM +0100, Maxime Chevallier wrote:
> Marvell 10G PHY driver has a generic way of initializing the supported
> link modes by reading the PHY's C45 PMA abilities. This can be made
> generic, since these registers are part of the 802.3 specifications.
>
> This commit extracts the config_init link_mode initialization code from
> marvell10g and uses it to introduce the genphy_c45_read_abilities
> function.
Hi Maxime
I think the idea is good. I just have a few English language
issues/questions.
Capabilities is more often used than abilities. I just wondered if
abilities is taken from the 802.3 specifications?
Also, i wonder if we should include _pma_ in the name? At some point
we might want to do something similar for other sublayers.
> +/**
> + * genphy_c45_read_abilities - read supported link modes from PMA
> + * @phydev: target phy_device struct
> + *
> + * Read the supported link modes from the PMA Status 2 (1.8) register. If bit
> + * 1.8.9 is set, the list of supported modes is completed with the values in
> the
completed is not the right word. 'is build using the values in the' ?
> + * PMA Extended Abilities (1.11) register, indicating 1000BASET an 10G
> related
> + * modes. If bit 1.11.14 is set, then the list is also completed with the
> modes
list is also extended with the modes
> + * in the 2.5G/5G PMA Extended register (1.21), indicating if 2.5GBASET and
> + * 5GBASET are supported.
> + */
Thanks
Andrew
