Hi, all. I found info that IO APIC limit the number of cpu cores for interrupt handling to 8(because of just 4 bits using for cpu number or something like this). But now MSI/MSI-X is used for interrupts and i don't know is this limit is actual now.
For example, i have 4 nic with 8 rx/tx queues each and 32 cpu cores. Can i scale nic interrupt handling to all this cores with smp_affinity? Thanks. -- Олег Неманов (Oleg Nemanov)
