On Thu, Oct 18, 2018 at 04:49:26PM +0000, Claudiu Manoil wrote: > > I can only advise you to check whether the MACCFG2 register settings are > consistent > at this point, when ping fails. You should check the I/F Mode bits (22-23) > and the > Full Duplex bit (31), in big-endian format. If these do not match the > 100Mbps full > duplex link mode, then it might be that another thread (probably doing > reset_gfar) > changes MACCFG2 concurrently. I think MACCFG2 may be dumped with ethtool -d. > I can get my hands on a board no sooner than maybe next week.
What does the MACCFG2 register actually do ? Is that connected to the phy somehow ? I'm wondering because it seems like the gianfar driver is doing the right things, and adjust_link() is getting called etc.. Something seems not to tolerate the change from GMII to MII. Daniel
