From: Petr Machata <pe...@mellanox.com> The SBMM register configures shared buffer allocation and settings for MC packets according to switch priority. The recommended values are no reserved buffer and alpha of 1/4, which corresponds to buf_max of 6. Update mlxsw_sp_sb_mms accordingly.
Signed-off-by: Petr Machata <pe...@mellanox.com> Reviewed-by: Jiri Pirko <j...@mellanox.com> Signed-off-by: Ido Schimmel <ido...@mellanox.com> --- .../mellanox/mlxsw/spectrum_buffers.c | 30 +++++++++---------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c index 7b9f79c7c025..12c61e0cc570 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c @@ -566,21 +566,21 @@ struct mlxsw_sp_sb_mm { } static const struct mlxsw_sp_sb_mm mlxsw_sp_sb_mms[] = { - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), - MLXSW_SP_SB_MM(20000, 0xff, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), + MLXSW_SP_SB_MM(0, 6, 4), }; #define MLXSW_SP_SB_MMS_LEN ARRAY_SIZE(mlxsw_sp_sb_mms) -- 2.17.1