Hi Ganesh, I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master] url: https://github.com/0day-ci/linux/commits/Ganesh-Goudar/cxgb4-do-L1-config-when-module-is-inserted/20180523-085637 config: sparc64-allyesconfig (attached as .config) compiler: sparc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=sparc64 All error/warnings (new ones prefixed by >>): drivers/scsi/csiostor/csio_hw.c: In function 'fwcaps16_to_caps32': >> drivers/scsi/csiostor/csio_hw.c:1490:17: error: 'FW_PORT_CAP_MDIX' >> undeclared (first use in this function); did you mean 'FW_PORT_CAP_MDI_S'? if (caps16 & FW_PORT_CAP_##__cap) \ ^ >> drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro >> 'CAP16_TO_CAP32' CAP16_TO_CAP32(MDIX); ^~~~~~~~~~~~~~ drivers/scsi/csiostor/csio_hw.c:1490:17: note: each undeclared identifier is reported only once for each function it appears in if (caps16 & FW_PORT_CAP_##__cap) \ ^ >> drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro >> 'CAP16_TO_CAP32' CAP16_TO_CAP32(MDIX); ^~~~~~~~~~~~~~ >> drivers/scsi/csiostor/csio_hw.c:1491:15: error: 'FW_PORT_CAP32_MDIX' >> undeclared (first use in this function); did you mean 'FW_PORT_CAP_MDIX'? caps32 |= FW_PORT_CAP32_##__cap; \ ^ >> drivers/scsi/csiostor/csio_hw.c:1503:2: note: in expansion of macro >> 'CAP16_TO_CAP32' CAP16_TO_CAP32(MDIX); ^~~~~~~~~~~~~~ vim +1490 drivers/scsi/csiostor/csio_hw.c e1735d9a Varun Prakash 2018-03-11 1477 e1735d9a Varun Prakash 2018-03-11 1478 /** e1735d9a Varun Prakash 2018-03-11 1479 * fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits e1735d9a Varun Prakash 2018-03-11 1480 * @caps16: a 16-bit Port Capabilities value e1735d9a Varun Prakash 2018-03-11 1481 * e1735d9a Varun Prakash 2018-03-11 1482 * Returns the equivalent 32-bit Port Capabilities value. e1735d9a Varun Prakash 2018-03-11 1483 */ e1735d9a Varun Prakash 2018-03-11 1484 fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) e1735d9a Varun Prakash 2018-03-11 1485 { e1735d9a Varun Prakash 2018-03-11 1486 fw_port_cap32_t caps32 = 0; e1735d9a Varun Prakash 2018-03-11 1487 e1735d9a Varun Prakash 2018-03-11 1488 #define CAP16_TO_CAP32(__cap) \ e1735d9a Varun Prakash 2018-03-11 1489 do { \ e1735d9a Varun Prakash 2018-03-11 @1490 if (caps16 & FW_PORT_CAP_##__cap) \ e1735d9a Varun Prakash 2018-03-11 @1491 caps32 |= FW_PORT_CAP32_##__cap; \ e1735d9a Varun Prakash 2018-03-11 1492 } while (0) e1735d9a Varun Prakash 2018-03-11 1493 e1735d9a Varun Prakash 2018-03-11 1494 CAP16_TO_CAP32(SPEED_100M); e1735d9a Varun Prakash 2018-03-11 1495 CAP16_TO_CAP32(SPEED_1G); e1735d9a Varun Prakash 2018-03-11 1496 CAP16_TO_CAP32(SPEED_25G); e1735d9a Varun Prakash 2018-03-11 1497 CAP16_TO_CAP32(SPEED_10G); e1735d9a Varun Prakash 2018-03-11 1498 CAP16_TO_CAP32(SPEED_40G); e1735d9a Varun Prakash 2018-03-11 1499 CAP16_TO_CAP32(SPEED_100G); e1735d9a Varun Prakash 2018-03-11 1500 CAP16_TO_CAP32(FC_RX); e1735d9a Varun Prakash 2018-03-11 1501 CAP16_TO_CAP32(FC_TX); e1735d9a Varun Prakash 2018-03-11 1502 CAP16_TO_CAP32(ANEG); e1735d9a Varun Prakash 2018-03-11 @1503 CAP16_TO_CAP32(MDIX); e1735d9a Varun Prakash 2018-03-11 1504 CAP16_TO_CAP32(MDIAUTO); e1735d9a Varun Prakash 2018-03-11 1505 CAP16_TO_CAP32(FEC_RS); e1735d9a Varun Prakash 2018-03-11 1506 CAP16_TO_CAP32(FEC_BASER_RS); e1735d9a Varun Prakash 2018-03-11 1507 CAP16_TO_CAP32(802_3_PAUSE); e1735d9a Varun Prakash 2018-03-11 1508 CAP16_TO_CAP32(802_3_ASM_DIR); e1735d9a Varun Prakash 2018-03-11 1509 e1735d9a Varun Prakash 2018-03-11 1510 #undef CAP16_TO_CAP32 e1735d9a Varun Prakash 2018-03-11 1511 e1735d9a Varun Prakash 2018-03-11 1512 return caps32; e1735d9a Varun Prakash 2018-03-11 1513 } e1735d9a Varun Prakash 2018-03-11 1514 :::::: The code at line 1490 was first introduced by commit :::::: e1735d9a98ab5593484bbba1933e362a261e0de0 scsi: csiostor: add support for 32 bit port capabilities :::::: TO: Varun Prakash <va...@chelsio.com> :::::: CC: Martin K. Petersen <martin.peter...@oracle.com> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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