This series of patches speed up reading on-chip memory (EDC and MC) by using AVX intrinsic instructions when available.
Patch 1 exports callback to register supported intrinsic instructions when available. Also rework logic to read EDC and MC. Patch 2 adds AVX CPU intrinsic instructions to read EDC and MC 256-bits at a time. Also fallback to regular 32-bit reads, if AVX is not available. Thanks, Rahul Rahul Lakkireddy (2): cxgb4: rework on-chip memory read cxgb4: speed up on-chip memory read drivers/net/ethernet/chelsio/cxgb4/Makefile | 3 +- drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h | 2 + drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h | 6 + .../net/ethernet/chelsio/cxgb4/cudbg_intrinsic.c | 43 +++++ .../net/ethernet/chelsio/cxgb4/cudbg_intrinsic.h | 33 ++++ .../ethernet/chelsio/cxgb4/cudbg_intrinsic_avx.c | 78 +++++++++ drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c | 70 +++++++- drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 5 + drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c | 7 +- drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c | 2 + drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 193 +++++++++++++-------- 11 files changed, 367 insertions(+), 75 deletions(-) create mode 100644 drivers/net/ethernet/chelsio/cxgb4/cudbg_intrinsic.c create mode 100644 drivers/net/ethernet/chelsio/cxgb4/cudbg_intrinsic.h create mode 100644 drivers/net/ethernet/chelsio/cxgb4/cudbg_intrinsic_avx.c -- 2.14.1
